Patents by Inventor Jiansheng Liao

Jiansheng Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119625
    Abstract: A method and system of automatically estimating a ball carrier in team sports.
    Type: Application
    Filed: June 16, 2021
    Publication date: April 11, 2024
    Applicant: Intel Corporation
    Inventors: Ming Lu, Liwei Liao, Haihua Lin, Xiaofeng Tong, Wenlong Li, Jiansheng Chen, Yiwei He
  • Patent number: 11915450
    Abstract: Embodiments are generally directed to methods and apparatuses for determining a frontal body orientation. An embodiment of a method for determining a three-dimensional (3D) orientation of frontal body of a player comprises: detecting each of a plurality of players in each of a plurality of frames captured by a plurality of cameras; for each of the plurality of cameras, tracking each of the plurality of players between continuous frames captured by the camera; and associating the plurality of frames captured by the plurality of cameras to generate the 3D orientation of each of the plurality of players.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: February 27, 2024
    Assignee: Intel Corporation
    Inventors: Yiwei He, Ming Lu, Haihua Lin, Liwei Liao, Jiansheng Chen, Xiaofeng Tong, Qiang Li, Wenlong Li
  • Publication number: 20180195512
    Abstract: A rotary compressor (100) includes a casing (1), an electric motor (2) and a compression mechanism (3), in which the electric motor (2) includes a stator core (21) and a rotor core (22), the compression mechanism (3) includes an air cylinder assembly (31) and a main bearing (32) connected to a side end face of the cylinder assembly (31) adjacent to the electric motor (2), the largest distance between a side end face of the stator core (21) adjacent to the first end wall (111) and the first end wall (111) is denoted by Dst, the smallest distance between a side end face of the rotor core (22) adjacent to the first end wall (111) and a side end face of a flange portion (321) of the main bearing (32) at one side adjacent to the first end wall (111) is denoted by Drt, in which Dst and Drt satisfy a relationship: 0.335?Dst/Drt?0.838.
    Type: Application
    Filed: September 24, 2015
    Publication date: July 12, 2018
    Applicant: Guangdong Meizi Compressor Co., Ltd.
    Inventors: Heng YANG, Jiansheng LIAO, Danwei LIU
  • Patent number: 8624630
    Abstract: Disclosed is a phase discriminator, including: a first XOR gate connected to a trigger and a delay unit, a second XOR gate connected to the trigger and a latch, wherein the first XOR gate is a current mode logic XOR gate, the first XOR gate comprises a first offset current source circuit outputting a first adjustable offset circuit for controlling amplitude of the error signal output by the first XOR gate; and/or, the second XOR gate is a current mode logic XOR gate, the second XOR gate comprises a second offset current source circuit outputting a second adjustable offset circuit for controlling amplitude of reference signal output by the second XOR gate. Also disclosed are a clock and data recovery system and a phase adjustment method. The present invention can prevent introducing noise coupling to the voltage control oscillator (VCO) module.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: January 7, 2014
    Assignee: ZTE Corporation
    Inventors: Jiansheng Liao, Shanyong Cao
  • Publication number: 20120293226
    Abstract: Disclosed is a phase discriminator, including: a first XOR gate connected to a trigger and a delay unit, a second XOR gate connected to the trigger and a latch, wherein the first XOR gate is a current mode logic XOR gate, the first XOR gate comprises a first offset current source circuit outputting a first adjustable offset circuit for controlling amplitude of the error signal output by the first XOR gate; and/or, the second XOR gate is a current mode logic XOR gate, the second XOR gate comprises a second offset current source circuit outputting a second adjustable offset circuit for controlling amplitude of reference signal output by the second XOR gate. Also disclosed are a clock and data recovery system and a phase adjustment method. The present invention can prevent introducing noise coupling to the voltage control oscillator (VCO) module.
    Type: Application
    Filed: April 18, 2011
    Publication date: November 22, 2012
    Inventors: Jiansheng Liao, Shanyong Cao