Patents by Inventor Jiantao CHEN
Jiantao CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240179027Abstract: This application disclose a link configuration method, to configure a DSVPN tunnel interface parameter. A controller obtains a first link profile for a first site and a second link profile for a second site from a link profile library, where the link profile library includes a plurality of link profiles. The controller obtains preconfigured global configuration information, where the global configuration information includes an address pool. The controller generates a first link configuration parameter of the first site and a second link configuration parameter of the second site based on the address pool, the first link profile, and the second link profile and according to a preset link configuration rule. The controller sends the first link configuration parameter to the first site and sends the second link configuration parameter to the second site.Type: ApplicationFiled: February 2, 2024Publication date: May 30, 2024Inventors: Jiantao CHEN, Changnian XU, Weiquan FENG
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Publication number: 20240169947Abstract: A display substrate includes a base substrate, a plurality of photosensitive transistor units, a plurality of photosensitive ESD protection units, and at least one common signal line. The base substrate includes a display region, a peripheral region located at a periphery of the display region, and a binding region located at a side of the display region. The plurality of photosensitive transistor units, the plurality of photosensitive ESD protection units and the at least one common signal line are located in the peripheral region. The plurality of photosensitive transistor units is connected with binding pins in the binding region through a plurality of signal lines. At least one photosensitive ESD protection unit is connected with, and located between, at least one signal line and the common signal line.Type: ApplicationFiled: June 23, 2021Publication date: May 23, 2024Inventors: Zhengri LIN, Wenchao HAN, Xinle WANG, Yifan SONG, Wanzhi CHEN, Jing LIU, Wei SUN, Rui LIU, Xin DUAN, Zhaohui MENG, Mingming WANG, Lianghao ZHANG, Jiantao LIU
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Publication number: 20240168326Abstract: The present disclosure provides a display panel and a manufacturing method therefor, and a display apparatus, which relate to the technical field of displaying. The display panel includes a first base plate and a second base plate which are aligned with each other; the first base plate includes a first substrate and a thin film transistor; the thin film transistor includes an active layer; an optical adjustment layer is disposed on the second base plate; an orthographic projection of the optical adjustment layer on the first substrate overlaps with an orthographic projection of the active layer on the first substrate. That is, the optical adjustment layer corresponds to the active layer. In a laminating direction of the display panel, the existence of the optical adjustment layer with a certain height enables a reflecting surface of the second base plate to be closer to the first base plate.Type: ApplicationFiled: September 17, 2021Publication date: May 23, 2024Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yingying Qu, Lingdan Bo, Ting Dong, Jianhua Huang, Qiujie Su, Dongchuan Chen, Yanping Liao, Seungmin Lee, Jiantao Liu, Yue Yang
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Publication number: 20240162525Abstract: An electrode assembly, a secondary battery, a battery pack, and an electrical apparatus. In the electrode assembly, there are several electrode plate portions sequentially arranged in a laminated manner along its own thickness direction. During structural design, the current collector in at least one of the electrode plate portions is configured as a barrier, and by controlling the ratio between the thermal conductivity ?0 of the barrier and the thickness d0 of the barrier to be less than 3×107 W/(K*m2), the heat flux density of the barrier along the thickness direction of the electrode assembly is reduced and the thermal resistance is increased, thus forming an effective thermal barrier in the thickness direction of the electrode assembly.Type: ApplicationFiled: January 25, 2024Publication date: May 16, 2024Applicant: CONTEMPORARY AMPEREX TECHNOLOGY CO., LIMITEDInventors: Jiantao HUANG, Xin SUN, Huanji LIU, Xiao CHEN, Haizu JIN
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Publication number: 20240153968Abstract: A display substrate, a method for manufacturing the same, and a display device are provided.Type: ApplicationFiled: January 25, 2022Publication date: May 9, 2024Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yihe Jia, Xiao Wang, Xiangqian Ding, Weitao Chen, Hui Guo, Haipeng Liu, Xun Wang, Jiantao Liu, Jing Liu, Yongzhi Song, Yan Pang
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Publication number: 20240135892Abstract: Disclosed are a method for adjusting a signal of a display panel, a time controller integrated circuit, a display panel, and a storage medium. The method includes: converting first data into a first data voltage signal using a first data voltage, in response to a set condition being reached, sending the first data voltage signal to a chip on film integrated circuit, the chip on film integrated circuit identifies the first data voltage signal to obtain a second data; acquiring the second data from the chip on film integrated circuit, determining that the chip on film integrated circuit fails to identify the first data in response to the second data being different from the first data; and adjusting the first data voltage until a second data voltage signal converted from the first data using a second data voltage after adjustment being successfully identified by the chip on film integrated circuit.Type: ApplicationFiled: March 3, 2021Publication date: April 25, 2024Inventors: Yunlu CHEN, Changcheng LIU, Liugang ZHOU, Liu HE, Kun YANG, Jianwei SUN, Jun WANG, Yunyun LIANG, Qing LI, Yu QUAN, Yanting HUANG, Zhengru PAN, Bingbing YAN, Jiantao LIU
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Publication number: 20240103327Abstract: Disclosed are a display substrate, a liquid crystal display panel (100) and a display device. The display substrate (9) includes: a base substrate (1), a plurality of sub-pixels arranged in an array on the base substrate, a plurality of data lines (D) extending in a first direction (X), a plurality of gate lines (G) extending in a second direction (Y), and a common electrode (2) arranged in a minimum area enclosed by the data lines and the gate lines; wherein the minimum area includes two sub-pixels, the common electrode includes a main electrode (21) with strip-shaped which is arranged at the junction of the two sub-pixels and a plurality of branch electrodes (22) with strip-shaped which are symmetrically distributed on two sides of the main electrode, and the extending directions of a part of the plurality of branch electrodes arranged on a same side of the main electrode are identical.Type: ApplicationFiled: April 27, 2021Publication date: March 28, 2024Inventors: Xiaoyu HUANG, Peng JIANG, Xiaoxiao CHEN, Yuanhui GUO, Xia SHI, Jiantao LIU
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Publication number: 20240096902Abstract: The dual gate array substrate of the present disclosure includes a plurality of groups of dual gate lines, a plurality of data lines, a plurality of pixel pairs and a plurality of common electrode lines, each common electrode line is arranged between two pixel units in a same pixel pair and is connected to common electrodes of the two pixel units through two first vias; a layer where the common electrode line is located and a layer where a source/drain electrode of a thin film transistor is located are different layers and insulated from each other; the two first vias are on both sides of the data line.Type: ApplicationFiled: April 27, 2021Publication date: March 21, 2024Inventors: Cong WANG, Yingmeng MIAO, Dongchuan CHEN, Seungmin LEE, Yanping LIAO, Xibin SHAO, Jiantao LIU
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Patent number: 11924004Abstract: This application disclose a link configuration method, to configure a DSVPN tunnel interface parameter. A controller obtains a first link profile for a first site and a second link profile for a second site from a link profile library, where the link profile library includes a plurality of link profiles. The controller obtains preconfigured global configuration information, where the global configuration information includes an address pool. The controller generates a first link configuration parameter of the first site and a second link configuration parameter of the second site based on the address pool, the first link profile, and the second link profile and according to a preset link configuration rule. The controller sends the first link configuration parameter to the first site and sends the second link configuration parameter to the second site.Type: GrantFiled: September 24, 2020Date of Patent: March 5, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Jiantao Chen, Changnian Xu, Weiquan Feng
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Patent number: 11913479Abstract: An impact-resistant balanced hydro-cylinder with pressure relief and buffering protection comprises a cylinder body (11), a piston (13), a piston rod (14), and a first valve core (21) and a second valve core (51) slidable relative to the cylinder body (11). A closed first gas cavity (22) and a closed second gas cavity (52) are respectively formed between the two valve cores and inner walls of two opposite ends of the cylinder body (11). A closed first oil cavity (32) and a closed second oil cavity (42) are respectively formed between the two valve cores and two end faces of the piston (13). A through hole (33) for the first oil cavity and a through hole (43) for the second oil cavity are respectively provided in the positions on the cylinder body (11) corresponding to the first oil cavity (32) and the second oil cavity (42).Type: GrantFiled: April 30, 2021Date of Patent: February 27, 2024Assignee: SHANDONG UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Lirong Wan, Xuehui Yu, Dejian Ma, Jiantao Wang, Fengwen Xin, Zhaoji Li, Guoqing Qi, Baolong Chen
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Publication number: 20210021445Abstract: This application disclose a link configuration method, to configure a DSVPN tunnel interface parameter. A controller obtains a first link profile for a first site and a second link profile for a second site from a link profile library, where the link profile library includes a plurality of link profiles. The controller obtains preconfigured global configuration information, where the global configuration information includes an address pool. The controller generates a first link configuration parameter of the first site and a second link configuration parameter of the second site based on the address pool, the first link profile, and the second link profile and according to a preset link configuration rule. The controller sends the first link configuration parameter to the first site and sends the second link configuration parameter to the second site.Type: ApplicationFiled: September 24, 2020Publication date: January 21, 2021Inventors: Jiantao CHEN, Changnian XU, Weiquan FENG