Patents by Inventor Jiawei Fu

Jiawei Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220045358
    Abstract: The present application discloses a sulfide solid electrolyte and a method for the preparation thereof, an all solid state lithium secondary battery, and an apparatus containing the all solid state lithium secondary battery. The sulfide solid electrolyte is obtained by compounding at least Li2S, P2S5 and a dopant MxS2O3, wherein M is one or more selected from Na, K, Ba and Ca, and 1?x?2.
    Type: Application
    Filed: October 25, 2021
    Publication date: February 10, 2022
    Applicant: Contemporary Amperex Technology Co., Limited
    Inventors: Chengdu LIANG, Jiawei FU, Chengyong LIU, Yongsheng GUO, Bobing HU
  • Patent number: 11217822
    Abstract: The present application provides a preparation method for a solid electrolyte, including: acquiring an initial reaction mixture including a lithium precursor, a central atom ligand and an organic solvent; acquiring a modified solution including a borate ester and the organic solvent; mixing the initial reaction mixture and the modified solution, and drying to acquire an initial product; performing a grinding, cold press and heat treatment to the initial product to obtain the solid electrolyte. In the preparation method provided by the present application, a B and O co-doped sulphide solid electrolyte can be obtained by modifying the sulphide solid electrolyte with the borate ester as a doping raw material. The ionic conductivity of the prepared sulphide solid electrolyte is significantly improved, which is also conducive to improvement of energy density of the all-solid-state batteries.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: January 4, 2022
    Assignee: CONTEMPORARY AMPEREX TECHNOLOGY CO., LIMITED
    Inventors: Chengdu Liang, Chengyong Liu, Bobing Hu, Jiawei Fu, Qian Li, Meng Cheng, Yongsheng Guo
  • Patent number: 11201605
    Abstract: A buffer stage for amplifying a clock signal generated by a current controlled oscillator that receives a first current at a first supply voltage from a first current source. The buffer stage comprises an input terminal configured to receive the clock signal; an output terminal configured to output a buffered signal; at least one buffer, coupled between the input and output terminal, configured to receive a second current at a second supply voltage and buffer the clock signal to generate the buffered signal; a clamping circuit that receives the first current and the second current, and generates a first supply voltage and a second supply voltage. The clamping circuit clamps the second supply voltage equal to the first supply voltage.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: December 14, 2021
    Assignee: NXP USA, Inc.
    Inventors: Jianzhou Wu, Jiawei Fu, Yang Wang, Bin Zhang
  • Publication number: 20210286389
    Abstract: A bias current generator circuit includes a current path and a leakage control circuit. The current path is connected between a supply voltage and a ground level. The current path includes a transistor and a resistor. The transistor has a current channel connected in the current path. The resistor has an upper terminal and a lower terminal connected in the current path, and a well contact to allow a reverse leakage current of the resistor to flow through. The leakage control circuit is connected to the supply voltage. The leakage control circuit includes a driving transistor to provide a driving voltage to the well contact of the resistor, and to allow the reverse leakage current of the resistor to flow into the leakage control circuit.
    Type: Application
    Filed: March 10, 2021
    Publication date: September 16, 2021
    Inventors: Jiawei Fu, Jianzhou Wu, Jie Jin, Yikun Mo, Stefano Pietri
  • Publication number: 20210257657
    Abstract: The present application provides a preparation method for a solid electrolyte, including: acquiring an initial reaction mixture including a lithium precursor, a central atom ligand and an organic solvent; acquiring a modified solution including a borate ester and the organic solvent; mixing the initial reaction mixture and the modified solution, and drying to acquire an initial product; performing a grinding, cold press and heat treatment to the initial product to obtain the solid electrolyte. In the preparation method provided by the present application, a B and O co-doped sulphide solid electrolyte can be obtained by modifying the sulphide solid electrolyte with the borate ester as a doping raw material. The ionic conductivity of the prepared sulphide solid electrolyte is significantly improved, which is also conducive to improvement of energy density of the all-solid-state batteries.
    Type: Application
    Filed: June 17, 2020
    Publication date: August 19, 2021
    Applicant: Contemporary Amperex Technology Co., Limited
    Inventors: Chengdu LIANG, Chengyong LIU, Bobing HU, Jiawei FU, Qian LI, Meng CHENG, Yongsheng GUO
  • Publication number: 20210194467
    Abstract: A buffer stage for amplifying a clock signal generated by a current controlled oscillator that receives a first current at a first supply voltage from a first current source. The buffer stage comprises an input terminal configured to receive the clock signal; an output terminal configured to output a buffered signal; at least one buffer, coupled between the input and output terminal, configured to receive a second current at a second supply voltage and buffer the clock signal to generate the buffered signal; a clamping circuit that receives the first current and the second current, and generates a first supply voltage and a second supply voltage. The clamping circuit clamps the second supply voltage equal to the first supply voltage.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 24, 2021
    Inventors: Jianzhou Wu, Jiawei Fu, Yang Wang, Bin Zhang
  • Patent number: 10797710
    Abstract: A clock generator includes an oscillator that generates a clock signal as an output of the clock generator, where the frequency of the clock signal is dependent on a bias current. A feedback circuit receives the clock signal and generates a feedback signal indicative of a frequency of the clock signal. A voltage detector generates a charged voltage using the feedback signal, compares a source voltage with the charged voltage, and generates a detection signal indicative of the comparison between the source voltage and the charged voltage. A control voltage generator generates a control voltage using the detection signal. The bias current is generated by a bias current source using the control voltage.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: October 6, 2020
    Assignee: NXP USA, Inc.
    Inventors: Yan Huang, Jiawei Fu, Jianluo Chen, Bin Zhang
  • Publication number: 20200287556
    Abstract: A clock generator includes an oscillator that generates a clock signal as an output of the clock generator, where the frequency of the clock signal is dependent on a bias current. A feedback circuit receives the clock signal and generates a feedback signal indicative of a frequency of the clock signal. A voltage detector generates a charged voltage using the feedback signal, compares a source voltage with the charged voltage, and generates a detection signal indicative of the comparison between the source voltage and the charged voltage. A control voltage generator generates a control voltage using the detection signal. The bias current is generated by a bias current source using the control voltage.
    Type: Application
    Filed: June 11, 2019
    Publication date: September 10, 2020
    Inventors: Yan Huang, Jiawei Fu, Jianluo Chen, Bin Zhang
  • Patent number: 10659013
    Abstract: A start-up circuit for a ring current-controlled oscillator (CCO) includes a replica CCO current generator, a replica ring CCO, and a buffer. The ring CCO is connected to a CCO driver and the buffer. The CCO driver generates a CCO current based on a reference current. The ring CCO generates a CCO output voltage at a first oscillating frequency based on the CCO current. The replica CCO current generator generates a replica CCO current based on a reference voltage. The replica ring CCO generates a replica CCO output voltage at a second oscillating frequency based on the replica CCO current. The buffer provides a first current to the ring CCO when the first oscillating frequency is lower than a desired oscillating frequency, and drains a second current from the ring CCO when the first oscillating frequency is greater than the desired oscillating frequency.
    Type: Grant
    Filed: January 1, 2019
    Date of Patent: May 19, 2020
    Assignee: NXP USA, Inc.
    Inventors: Yang Wang, Jianzhou Wu, Jie Jin, Jiawei Fu
  • Publication number: 20190222201
    Abstract: A start-up circuit for a ring current-controlled oscillator (CCO) includes a replica CCO current generator, a replica ring CCO, and a buffer. The ring CCO is connected to a CCO driver and the buffer. The CCO driver generates a CCO current based on a reference current. The ring CCO generates a CCO output voltage at a first oscillating frequency based on the CCO current. The replica CCO current generator generates a replica CCO current based on a reference voltage. The replica ring CCO generates a replica CCO output voltage at a second oscillating frequency based on the replica CCO current. The buffer provides a first current to the ring CCO when the first oscillating frequency is lower than a desired oscillating frequency, and drains a second current from the ring CCO when the first oscillating frequency is greater than the desired oscillating frequency.
    Type: Application
    Filed: January 1, 2019
    Publication date: July 18, 2019
    Inventors: Yang Wang, Jianzhou Wu, Jie Jin, Jiawei Fu