Patents by Inventor Jiayuan Fang

Jiayuan Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9910945
    Abstract: Methods, systems, and computer-readable media for reference impedance adaptation are disclosed. The method may comprise a step of providing a network model of a circuit having at least one port, wherein the network model includes at least one network parameter, the network parameter being associated with the port and being defined based on a reference impedance of the port. The method may further comprise computing an input impedance of the port based on the network parameter. The method may also include defining a new reference impedance for the port based on the input impedance. Moreover, the method may include calculating a new network parameter of the network model based on the new reference impedance.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: March 6, 2018
    Assignee: Sigrity, Inc.
    Inventors: Jiayuan Fang, Guoxin Fan
  • Patent number: 9818306
    Abstract: A method for assessing a user's progress in learning a plurality of skills is disclosed. The method may include assigning a weighing factor to each of the plurality of skills. For each skill, the method may include providing a plurality of problems to the user, receiving answers to the plurality of problems from the user, and determining an accuracy rate associated with that skill based on the answers. The method may also include determining a probability of obtaining a score equal to or above a predetermined score by the user based on the weighting factors assigned to the plurality of skills and the accuracy rates associated with the plurality of skills.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: November 14, 2017
    Assignee: AFFICIENT ACADEMY, INC.
    Inventor: Jiayuan Fang
  • Patent number: 9542515
    Abstract: Methods, systems, and computer readable media are disclosed for simulating a circuit. The method may comprise a step of providing a network model of the circuit having a plurality of ports, the plurality of ports being associated with one or more net pairs. The method may also comprise combining the plurality of ports into one or more groups based on the net pairs, each group corresponding to a net pair. In addition, the method may comprise calculating, for each group, one or more expansion elements, wherein the one or more expansion elements are associated with a shared property among all ports of the group. Moreover, the method may comprise simulating the circuit using a combination of the expansion elements calculated for each group.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: January 10, 2017
    Assignee: Cadence Design Systems, Inc.
    Inventors: Jian Liu, Xiao Lin, Anyu Kuo, Jiayuan Fang
  • Publication number: 20160180725
    Abstract: A method for assessing a user's progress in learning a plurality of skills is disclosed. The method may include assigning a weighing factor to each of the plurality of skills. For each skill, the method may include providing a plurality of problems to the user, receiving answers to the plurality of problems from the user, and determining an accuracy rate associated with that skill based on the answers. The method may also include determining a probability of obtaining a score equal to or above a predetermined score by the user based on the weighting factors assigned to the plurality of skills and the accuracy rates associated with the plurality of skills.
    Type: Application
    Filed: December 17, 2014
    Publication date: June 23, 2016
    Inventor: Jiayuan FANG
  • Patent number: 8874422
    Abstract: Methods, systems, and computer-readable media for simulating an electronic packaging structure are disclosed. The methods include providing an electromagnetic simulation framework for simulating the electronic packaging structure that includes at least two planes and an interconnect transitional component. The framework includes solvers for simulation based on parallel-plate, strip line, and microstrip line modes. The method also includes defining ports of the component based on modes, computing a network function characterizing the properties of the component; and associating ports with solvers of the framework.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: October 28, 2014
    Assignee: Sigrity, Inc.
    Inventors: Jian Liu, Jiayuan Fang
  • Patent number: 8694568
    Abstract: A computer-implemented method for calculating a time-domain impulse response with improved causality based on a first spectrum in a frequency domain is disclosed. The first spectrum may be band-limited. The method may calculate a first time-domain impulse response from the first spectrum. The method may remove a non-causal portion of the first system time-domain impulse response to obtain a second time-domain impulse response, and calculate a second spectrum of the second time-domain impulse response. The method may further modify the second spectrum by adding a causal signal such that a difference between the second spectrum and the first spectrum is reduced. The method may also calculate the time-domain impulse response with improved causality from the modified second spectrum.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: April 8, 2014
    Assignee: Sigrity, Inc.
    Inventors: Kezhou Li, Jing Wang, Jiayuan Fang
  • Patent number: 8682625
    Abstract: Method, system, and computer readable medium are disclosed for analyzing electrical properties of a circuit. The method may comprise: providing a network model including at least one network parameter, the network parameter being defined over a frequency range; converting the network parameter into an intermediate network parameter having first and second portions; identifying first and second frequencies defining a frequency sub-range; replacing the first portion of the intermediate network parameter with a DC value when a frequency associated with the intermediate network parameter is lower than the first frequency; replacing the first portion of the intermediate network parameter with a transitional value when the frequency associated with the intermediate network parameter is within the frequency sub-range; and converting the intermediate network parameter with the replaced first portion into an updated network parameter.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: March 25, 2014
    Assignee: Sigrity, Inc.
    Inventors: Jian Liu, Kaiyu Mao, Jiayuan Fang
  • Publication number: 20130138417
    Abstract: Methods, systems, and computer readable media are disclosed for simulating a circuit. The method may comprise a step of providing a network model of the circuit having a plurality of ports, the plurality of ports being associated with one or more net pairs. The method may also comprise combining the plurality of ports into one or more groups based on the net pairs, each group corresponding to a net pair. In addition, the method may comprise calculating, for each group, one or more expansion elements, wherein the one or more expansion elements are associated with a shared property among all ports of the group. Moreover, the method may comprise simulating the circuit using a combination of the expansion elements calculated for each group.
    Type: Application
    Filed: November 28, 2011
    Publication date: May 30, 2013
    Applicant: Sigrity, Inc.
    Inventors: Jian LIU, Xiao Lin, Anyu Kuo, Jiayuan Fang
  • Publication number: 20130138402
    Abstract: Methods, systems, and computer-readable media for reference impedance adaptation are disclosed. The method may comprise a step of providing a network model of a circuit having at least one port, wherein the network model includes at least one network parameter, the network parameter being associated with the port and being defined based on a reference impedance of the port. The method may further comprise computing an input impedance of the port based on the network parameter. The method may also include defining a new reference impedance for the port based on the input impedance. Moreover, the method may include calculating a new network parameter of the network model based on the new reference impedance.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 30, 2013
    Applicant: Sigrity, Inc.
    Inventors: Jiayuan Fang, Guoxin Fan
  • Publication number: 20130124181
    Abstract: Method, system, and computer readable medium are disclosed for analyzing electrical properties of a circuit. The method may comprise: providing a network model including at least one network parameter, the network parameter being defined over a frequency range; converting the network parameter into an intermediate network parameter having first and second portions; identifying first and second frequencies defining a frequency sub-range; replacing the first portion of the intermediate network parameter with a DC value when a frequency associated with the intermediate network parameter is lower than the first frequency; replacing the first portion of the intermediate network parameter with a transitional value when the frequency associated with the intermediate network parameter is within the frequency sub-range; and converting the intermediate network parameter with the replaced first portion into an updated network parameter.
    Type: Application
    Filed: November 11, 2011
    Publication date: May 16, 2013
    Applicant: Sigrity, Inc.
    Inventors: Jian LIU, Kaiyu MAO, Jiayuan FANG
  • Publication number: 20130006584
    Abstract: Methods, systems, and computer-readable media for simulating an electronic packaging structure are disclosed. The methods include providing an electromagnetic simulation framework for simulating the electronic packaging structure that includes at least two planes and an interconnect transitional component. The framework includes solvers for simulation based on parallel-plate, strip line, and microstrip line modes. The method also includes defining ports of the component based on modes, computing a network function characterizing the properties of the component; and associating ports with solvers of the framework.
    Type: Application
    Filed: June 28, 2011
    Publication date: January 3, 2013
    Applicant: Sigrity, Inc.
    Inventors: Jian LIU, Jiayuan FANG
  • Publication number: 20120269230
    Abstract: A computer-implemented method for calculating a time-domain impulse response with improved causality based on a first spectrum in a frequency domain is disclosed. The first spectrum may be band-limited. The method may calculate a first time-domain impulse response from the first spectrum. The method may remove a non-causal portion of the first system time-domain impulse response to obtain a second time-domain impulse response, and calculate a second spectrum of the second time-domain impulse response. The method may further modify the second spectrum by adding a causal signal such that a difference between the second spectrum and the first spectrum is reduced. The method may also calculate the time-domain impulse response with improved causality from the modified second spectrum.
    Type: Application
    Filed: April 21, 2011
    Publication date: October 25, 2012
    Applicant: Sigrity, Inc.
    Inventors: Kezhou LI, Jing Wang, Jiayuan Fang
  • Patent number: 6084779
    Abstract: The present invention is a multi-level printed circuit board (PCB) containing at least one power plane for conducting and distributing electrical power and at least one ground plane, spaced apart from the power plane, for providing and distributing an electrical ground. At least one integrated circuit chip is mounted on the printed circuit board. At least one signal plane is spaced apart from both the power plane and the ground plane, for conducting and distributing electrical signals from a first point to a second point. The signal plane(s) each have a portion or "patch" that is electrically isolated from signal traces in the remainder of the signal plane. The patches are placed in the area underneath the integrated circuit chip. The patches are connected, respectively, to the power plane or to the ground plane, for reducing effective inductance and input impedance. The multi-level PCB has one or more plated through hole vias for connecting the power or ground plane to a patch.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: July 4, 2000
    Assignee: Sigrity, Inc.
    Inventor: Jiayuan Fang
  • Patent number: 5566083
    Abstract: The present invention features a method for analyzing voltage fluctuations in multilayered electronic packaging structures. A physical electronic packaging structure having at least two, spaced-apart, metallic planes and a via are first provided. This package has an inherent input impedance associated with the via and is essentially dependent upon the radius of the via. A numerical model of a portion of the physical electronic packaging structure containing the via is made. An effective input impedance of the numerical model is then obtained. A unique impedance transforming operation is used to cause the effective input impedance of the numerical model to essentially match the input impedance of the physical structure, thus allowing an accurate simulation of the physical structure.
    Type: Grant
    Filed: October 18, 1994
    Date of Patent: October 15, 1996
    Assignee: The Research Foundation Of State University Of New York
    Inventor: Jiayuan Fang
  • Patent number: 5504423
    Abstract: A method for analyzing interactions between signal traces/vias and ground/power planes in multilayered electronic packaging structures is featured. The structure is provided with at least two, spaced-apart, conductive (generally metallic) planes, a conductive signal trace interposed between and coplanar with the spaced-apart conductive planes, and a via connected to the signal trace. Current that is assumed to be flowing in the via and signal trace is decomposed into two component currents called "modes". The first mode corresponds to a current which induces an electromagnetic field, resulting in an equal potential between the two conductive planes surrounding the signal trace. The second mode is the current which induces an electromagnetic field, resulting in a different voltage potential between the two surrounding conductive planes.
    Type: Grant
    Filed: November 1, 1994
    Date of Patent: April 2, 1996
    Assignee: The Research Foundation of State University of New York
    Inventor: Jiayuan Fang