Patents by Inventor Jick Hong Yee

Jick Hong Yee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8883548
    Abstract: Electronic device quality Aluminum Antimonide (AlSb)-based single crystals produced by controlled atmospheric annealing are utilized in various configurations for solar cell applications. Like that of a GaAs-based solar cell devices, the AlSb-based solar cell devices as disclosed herein provides direct conversion of solar energy to electrical power.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: November 11, 2014
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: John W. Sherohman, Jick Hong Yee, Arthur W. Combs, III
  • Patent number: 8338916
    Abstract: In one embodiment, a method for forming a non-conductive crystalline oxide layer on an AlSb crystal includes heat treating an AlSb crystal in a partial vacuum atmosphere at a temperature conducive for air adsorbed molecules to desorb, surface molecule groups to decompose, and elemental Sb to evaporate from a surface of the AlSb crystal and exposing the AlSb crystal to an atmosphere comprising oxygen to form a crystalline oxide layer on the surface of the AlSb crystal. In another embodiment, a method for forming a non-conductive crystalline oxide layer on an AlSb crystal includes heat treating an AlSb crystal in a non-oxidizing atmosphere at a temperature conducive for decomposition of an amorphous oxidized surface layer and evaporation of elemental Sb from the AlSb crystal surface and forming stable oxides of Al and Sb from residual surface oxygen to form a crystalline oxide layer on the surface of the AlSb crystal.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: December 25, 2012
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: John William Sherohman, Jick Hong Yee, Arthur William Coombs, III, Kuang Jen J. Wu
  • Publication number: 20120161288
    Abstract: In one embodiment, a method for forming a non-conductive crystalline oxide layer on an AlSb crystal includes heat treating an AlSb crystal in a partial vacuum atmosphere at a temperature conducive for air adsorbed molecules to desorb, surface molecule groups to decompose, and elemental Sb to evaporate from a surface of the AlSb crystal and exposing the AlSb crystal to an atmosphere comprising oxygen to form a crystalline oxide layer on the surface of the AlSb crystal. In another embodiment, a method for forming a non-conductive crystalline oxide layer on an AlSb crystal includes heat treating an AlSb crystal in a non-oxidizing atmosphere at a temperature conducive for decomposition of an amorphous oxidized surface layer and evaporation of elemental Sb from the AlSb crystal surface and forming stable oxides of Al and Sb from residual surface oxygen to form a crystalline oxide layer on the surface of the AlSb crystal.
    Type: Application
    Filed: December 22, 2010
    Publication date: June 28, 2012
    Applicant: Lawrence Livermore National Security, LLC
    Inventors: John William Sherohman, Jick Hong Yee, Arthur William Coombs, III, Kuang Jen J. Wu
  • Publication number: 20120058595
    Abstract: Electronic device quality Aluminum Antimonide (AlSb)-based single crystals produced by controlled atmospheric annealing are utilized in various configurations for solar cell applications. Like that of a GaAs-based solar cell devices, the AlSb-based solar cell devices as disclosed herein provides direct conversion of solar energy to electrical power.
    Type: Application
    Filed: October 24, 2011
    Publication date: March 8, 2012
    Inventors: John W. Sherohman, Jick Hong Yee, Arthur W. Combs, III
  • Patent number: 7224041
    Abstract: For the first time, an aluminum antimonide (AlSb) single crystal substrate is utilized to lattice-match to overlying semiconductor layers. The AlSb substrate establishes a new design and fabrication approach to construct high-speed, low-power electronic devices while establishing inter-device isolation. Such lattice matching between the substrate and overlying semiconductor layers minimizes the formation of defects, such as threaded dislocations, which can decrease the production yield and operational life-time of 6.1-? family heterostructure devices.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: May 29, 2007
    Assignee: The Regents of the University of California
    Inventors: John W. Sherohman, Arthur W. Coombs, III, Jick Hong Yee, Kuang Jen J. Wu