Abstract: Within a method for forming a microelectronic fabrication, there is ion implanted into a corner of a topographic feature within a microelectronic substrate a dose of an implanting ion such as to effect rounding of the corner of the topographic feature when thermally oxidizing the microelectronic substrate. The dose of the implanting ion is implanted while employing a laterally etched mask layer as an ion implantation mask layer which exposes the corner. The dose of the implanting ion is selected from the group consisting of silicon containing ions, germanium containing ions, arsenic containing ions, phosphorus containing ions and boron containing ions, such to provide for rounding of the corner with enhanced process efficiency.

Abstract: Within a method for forming a microelectronic fabrication, there is ion implanted into a corner of a topographic feature within a microelectronic substrate a dose of an implanting ion such as to effect rounding of the corner of the topographic feature when thermally oxidizing the microelectronic substrate. The dose of the implanting ion is implanted while employing a laterally etched mask layer as an ion implantation mask layer which exposes the corner. The dose of the implanting ion is selected from the group consisting of silicon containing ions, germanium containing ions, arsenic containing ions, phosphorus containing ions and boron containing ions, such to provide for rounding of the corner with enhanced process efficiency.

Abstract: A method for etching bonding pad access openings in a passivation layer of an integrated circuit is described. The method utilizes a two step etching procedure wherein the first step etches isotropically through a major portion of the passivation layer under conditions which provide very high etch rate selectivities of the passivation material to the photoresist. These high selectivitities result in virtually no erosion of the photoresist while the greater part of the opening is etched. A second anisotropic etch step wherein the base of the access opening is defined faithfully replicates the dimensions of the mask pattern. This two step etch process permits the use of photoresist layers of moderate thickness as well as photoresist layers with thin regions, such as occur when the photoresist is deposited over the uneven surface topography typically found on unplanarized passivation layers.

Abstract: A protective cap of dielectric material is deposited by plasma-enhanced chemical vapor deposition on the surface of electrical bonding pads of semiconductor integrated circuits prior to deposition of the final passivation layer. The protective cap serves to isolate the pad surface from electrochemical or other interaction with the etching solution used to open contact holes through the passivation layer. This prevents the formation of surface damage and residues on the pad which lead to yield and reliability problem with integrated circuits.