Abstract: An example method for Downstream External Physical Interface (DEPI) in Data Over Cable Service Interface Specification (DOCSIS) 3.1 network environments is provided and includes generating, at a Converged Cable Access Platform (CCAP) core, a DEPI-Packet Streaming Protocol (PSP) pseudo-wire (PW) packet including a PSP sub-layer header having a same length for a Quadrature Amplitude Modulation (QAM) channel and an Orthogonal Frequency-Division Multiplexing (OFDM) channel in the DOCSIS network environment, and transmitting the DEPI-PSP PW packet over a DEPI interface to a remote physical layer (R-PHY) entity.

Abstract: An example method for Downstream External Physical Interface (DEPI) in Data Over Cable Service Interface Specification (DOCSIS) 3.1 network environments is provided and includes generating, at a Converged Cable Access Platform (CCAP) core, a DEPI-Packet Streaming Protocol (PSP) pseudo-wire (PW) packet including a PSP sub-layer header having a same length for a Quadrature Amplitude Modulation (QAM) channel and an Orthogonal Frequency-Division Multiplexing (OFDM) channel in the DOCSIS network environment, and transmitting the DEPI-PSP PW packet over a DEPI interface to a remote physical layer (R-PHY) entity.

Abstract: An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of Ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each has guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. As a local network, the architecture supports guaranteed bandwidth for delivery of data flows to a plurality of host devices.

Abstract: Some embodiments of the present invention may include a DPLL circuit comprising a firmware. The firmware may comprise a re-sampled NCO phase detector capable of receiving a reference clock timing signal and a VCXO clock timing signal. The re-sampled NCO phase detector may comprise a resampler capable of receiving phase output and the VCXO clock timing signal and resampling the phase output; and a subtractor capable of receiving the resampled phase output and subtracting the resampled phase output from a calculated mean value of the phase output. The firmware may further comprise a frequency detector capable of receiving the reference clock timing signal and the VCXO clock timing signal; and a multiplexer capable of switching between the re-sampled NCO phase detector and the frequency detector dependent upon a frequency lock status.

Abstract: Some embodiments of the present invention may include a DPLL circuit comprising a firmware. The firmware may comprise a re-sampled NCO phase detector capable of receiving a reference clock timing signal and a VCXO clock timing signal. The re-sampled NCO phase detector may comprise a resampler capable of receiving phase output and the VCXO clock timing signal and resampling the phase output; and a subtractor capable of receiving the resampled phase output and subtracting the resampled phase output from a calculated mean value of the phase output. The firmware may further comprise a frequency detector capable of receiving the reference clock timing signal and the VCXO clock timing signal; and a multiplexer capable of switching between the re-sampled NCO phase detector and the frequency detector dependent upon a frequency lock status.

Abstract: An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each have guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. The architecture generally can be used to support connection-oriented physical layer connectivity between a remote device and the central concentrator.

Abstract: In one embodiment, a switch provides output to a digital radio frequency (RF) modulator having a filtered input stage. The switch is configured to selectively provide a zero power data signal to the RF modulator based on a transient event control signal received at the switch.

Abstract: The present invention is directed to systems and methods for providing an AGC circuit for maintaining a constant output power level from an amplifier. More specifically, the AGC circuit includes a circuitry for determining whether an input signal is a QAM or a CW signal. A QAM/CW gain switch is then controlled depending upon the input signal. Depending upon the mode of the QAM/CW gain switch, the AGC circuit either attenuates the power level of the signal or bypasses the signal. The bypassed or attenuated signal is then compared to a reference signal so that the AGC circuit produces an adjusting voltage accordingly. The amplifier finally receives the adjusting voltage and attenuates the output power level of the signal.

Abstract: An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each have guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. The architecture generally can be used to support connection-oriented physical layer connectivity between a remote device and the central concentrator.

Abstract: An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each have guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. The architecture generally can be used to support connection-oriented physical layer connectivity between a remote device and the central concentrator.

Abstract: Disclosed herein are methods of providing a client with local area network connectivity and access to other services in a cable network. One such method includes: allocating bandwidth in the network to support bi-directional data communication between the host and a central concentrator. Bandwidth is allocated for a downstream flow on at least one downstream frequency channel based on a mapping between the downstream flow and a particular octet in a downstream packet. Bandwidth is allocated for an upstream flow on at least one non-shared upstream tone. The method also includes conveying a bi-directional data flow between the host and the concentrator over the allocated bandwidth, including conveying the upstream flow using the allocated bandwidth and conveying the downstream flow using the allocated bandwidth. The method also includes utilizing bandwidth in the network not allocated to data communications to provide the host with at least one audio/visual service.

Abstract: The present invention is directed to systems and methods for providing an AGC circuit for maintaining a constant output power level from an amplifier. More specifically, the AGC circuit includes a circuitry for determining whether an input signal is a QAM or a CW signal. A QAM/CW gain switch is then controlled depending upon the input signal. Depending upon the mode of the QAM/CW gain switch, the AGC circuit either attenuates the power level of the signal or bypasses the signal. The bypassed or attenuated signal is then compared to a reference signal so that the AGC circuit produces an adjusting voltage accordingly. The amplifier finally receives the adjusting voltage and attenuates the output power level of the signal.

Abstract: An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each have guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. The architecture generally can be used to support connection-oriented physical layer connectivity between a remote device and the central concentrator.

Abstract: An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each have guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. The architecture generally can be used to support connection-oriented physical layer connectivity between a remote device and the central concentrator.

Abstract: An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each have guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. The architecture generally can be used to support connection-oriented physical layer connectivity between a remote device and the central concentrator.

Abstract: An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Moreover, an automatic frequency control resolves some issues of a free-running clock in an upstream tuner of the central concentrator by performing adjustments based on the average frequency error of a number of active upstream tones. In the preferred embodiments of the present invention, the automatic frequency control (AFC) utilizes a feedback loop for at least each active upstream tone. Also, the average of the active upstream tones is determined and is utilized in providing feedback to adjust the automatic frequency control (AFC).

Abstract: The present invention is directed towards an open-loop thermal compensation circuit that is suitable for use in a burst-mode laser transmitter. The compensation circuit adjusts the optical power level to ensure that the laser diode remains at an optimum power level. The thermal compensation circuit includes a thermistor having a thermal current, which is dependent upon any temperature fluctuations, where the thermal current adjusts a laser current. A change in the laser current subsequently adjusts the optical power level. Also included is a control circuit for turning on and off the laser diode with a control current, which is dependent upon the presence or absence of incoming electrical signals.

Abstract: A low cost white noise generator. An oscillator provides a signal to an analog-to-digital (AID) converter for digitizing. A bit-order reversal circuit reverses the order of the received bits, wherein the reversal circuit provides bits having an order ranging from LSB to MSB. A digital-to-analog (D/A) converter subsequently converts the reversed digital signal back to an analog signal, which is a white noise signal due to the random nature of reversing the bits provided by the A/D converter.

Abstract: The present invention provides an apparatus and method for detecting the presence of a carrier signal that is included in the reverse signals of a communications system. The present invention uses an improved apparatus that determines the average power of the reverse signals during a predetermined counting cycle. The average power is then compared to a threshold power value. If the average power exceeds the threshold power value, an enable signal is provided to allow further transmission of the reverse signals.

Abstract: The present invention provides an improved apparatus and method for detecting a reverse carrier signal. The present invention utilizes a peak detector/envelope filter for determining the peak level of the reverse analog waveform. The peak level is compared to a threshold level during a predetermined time period to determine the presence of a valid reverse carrier signal. Once determined, an enable signal is provided to an electronics device that allows further transmission of the reverse signals.