Abstract: An amplifier circuit with a shared current source a first amplifier, a second amplifier and a current source. The output of the first amplifier (10) is coupled to the current source (30). When the second amplifier (20) is cascaded onto the first amplifier (10), the current source (30) is also connected to the second amplifier (20), such that these two amplifiers can share a common drive current, so the power dissipated by these two amplifiers is greatly reduced. This technique is implemented with Class A amplifiers, Class B amplifiers, Class AB amplifiers or a combination of the above amplifiers in cascade.

Abstract: A temperature compensated technique and circuit can be realized through the generation of a temperature compensated output voltage (Vnew) provided after summing the temperature coefficients (TC1,TC2) of two base voltages (VTC1, VTC2) assigned with different weights (a, b) and producing a new temperature coefficient (TCnew). This TCnew satisfies the expression: TCnew=TC1+a×(TC2?TC1), where the assigned weighted value (a) can be either a positive or a negative value, depending on the requirement of a circuit, in order to develop voltage supply suitable for wider applications.

Abstract: An amplifier circuit with a shared current source a first amplifier, a second amplifier and a current source. The output of the first amplifier (10) is coupled to the current source (30). When the second amplifier (20) is cascaded onto the first amplifier (10), the current source (30) is also connected to the second amplifier (20), such that these two amplifiers can share a common drive current, so the power dissipated by these two amplifiers is greatly reduced. This technique is implemented with Class A amplifiers, Class B amplifiers, Class AB amplifiers or a combination of the above amplifiers in cascade.

Abstract: A temperature compensated technique and circuit can be realized through the generation of a temperature compensated output voltage (Vnew) provided after summing the temperature coefficients (TC1,TC2) of two base voltages (VTC1, VTC2) assigned with different weights (a, b) and producing a new temperature coefficient (TCnew). This TCnew satisfies the expression: TCnew=TC1+a×(TC2-TC1), where the assigned weighted value (a) can be either a positive or a negative value, depending on the requirement of a circuit, in order to develop voltage supply suitable for wider applications.

Abstract: A method for driving liquid crystal display devices is disclosed, and includes the steps: establishing a minimum voltage level (V5) to be base voltage; establishing the other voltage levels (V1˜V4) besides the base voltage from the high voltage level (V5); adjusting the established voltage levels to cause the voltage difference dV between adjacent voltage levels to maintain a constant dV, so as to satisfy the relationship: V5?V4=V4?V3=V2?V11=V1?V0=dV. Since the voltage levels V0˜V5 are set up on the basis of previously established voltage levels, if any established voltage values are changed, all subsequently established voltage values will be changed simultaneously to match the constant voltage difference (dV) between adjacent voltage levels.

Abstract: A power device termination structure is disclosed. The structure comprises a primary field plate electrically connect to a main junction, a secondary field plate electrically connect to a field ring which are apart from the main junction, and a floating field plate formed in between the primary field plate and secondary field plate. The primary field plate and secondary field plate are formed on an insulating layer, and the floating field plate is buried in the insulating layer. The endings of the floating field plate are in alignment with the ends of the extension portion of the primary field plate and the secondary field plate. The primary field plate, the secondary field plate and the floating conductive plate, are capacitively coupled each other so that the electrical field crowding problem is lesser.

Abstract: Disclosed is a method for fabricating thin wafer insulated gate bipolar transistors (IGBTs), in which a portion on the back side of the device region is removed to form a hollow region with a depth that results in a device region thickness equivalent to the thickness of a thin wafer while the rest of the wafer remains its standard thickness. In other words, the method according to the present invention is suitable for the currently used wafer transfer stations under thin wafer conditions. The non-punch-through type insulated gate bipolar transistor (NPT-IGBT) fabricated with this method gets rid of an epi-layer and the “lifetime killer” process. The punch-through type insulated gate bipolar transistor (PT-IGBT) fabricated with this method has higher switching efficiency due to reduced injection efficiency of the p+-type minority carriers.