Abstract: A dielectric material is strengthened by bonding a metal component to the dielectric matrix. The metal component may be a metal oxide or metal oxide precursor. The metal component may be deposited on the substrate with the dielectric material, or sol-gel chemistry may be used and the liquid solution spin-coated on a substrate.

Abstract: An ultraviolet sensitive material may be formed within a semiconductor structure covered with a suitable hard mask. At an appropriate time, the underlying ultraviolet sensitive material may be exposed to ultraviolet radiation, causing the material to exhaust through the overlying hard mask. As a result, an air gap may be created having desirable characteristics as a dielectric.

Abstract: Method and structure for passivating conductive material are disclosed. Atomic layer deposition of a thin passivation layer such as titanium nitride upon a conductive layer comprising a material such as copper, in the presence of a dielectric material not conducive to surface reaction with gaseous precursors used in the deposition schema, facilitates highly selective and accurate passivation which may improve electromigration performance, minimize leakage current to other conductive layers, and streamline process steps.

Abstract: A method for making a semiconductor device using carbon nitride as an etch stop diffusion barrier and/or a hard mask is described. An interconnect structure is made by at least: forming an etch stop diffusion layer, depositing an interlayer dielectric, etching necessary vias and trenches, forming a barrier layer, forming copper alloy, and planarizing. The use of a hard mask in the method is optional. The etch stop diffusion layer, the optional hard mask, or both comprised by carbon nitride.

Abstract: A method for making a semiconductor device is described. That method includes forming a sacrificial layer on a substrate, then forming a layer of photoresist on the sacrificial layer. After the photoresist layer is patterned, to form a patterned photoresist layer that has a first opening, part of the sacrificial layer is removed to generate an etched sacrificial layer that has a second opening that is substantially smaller than the first opening.

Abstract: An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to other processing treatments, the porogen is decomposed and removed from at least a portion of the porous matrix, leaving voids defined by the porous matrix in areas previously occupied by the porogen. The resultant structure has a desirably low k value as a result of the porosity and materials comprising the porous matrix and porogen. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.

Abstract: An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer comprising a porous matrix, as well as a porogen in certain variations, is formed adjacent a sacrificial dielectric layer. Subsequent to other processing treatments, a portion of the sacrificial dielectric layer is decomposed and removed through a portion of the porous matrix using supercritical carbon dioxide leaving voids in positions previously occupied by portions of the sacrificial dielectric layer. The resultant structure has a desirably low k value as a result of the voids and materials comprising the porous matrix and other structures. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.

Abstract: A low-k dielectric sacrificial material is formed within a microelectronic structure covered with a suitable porous or low density permeable material. At an appropriate time, the underlying sacrificial material is decomposed and diffused away through the overlying permeable material. As a result, at least one void is created, contributing to desirable dielectric characteristics.

Abstract: Treatment of dielectric material includes using a directed energy to break bonds in a dielectric material and a reactive gas to repair those bonds with an element of the reactive gas. The treated dielectric material may exhibit greater mechanical strength without a significantly greater dielectric constant. A treatment reactor including a directed energy source apparatus and a delivery mechanism to deliver the reactive gas is also described.

Abstract: An ultraviolet sensitive material may be formed within a semiconductor structure covered with a suitable hard mask. At an appropriate time, the underlying ultraviolet sensitive material may be exposed to ultraviolet radiation, causing the material to exhaust through the overlying hard mask. As a result, an air gap may be created having desirable characteristics as a dielectric.

Abstract: An embodiment of the present invention includes a method to form an air gap in a multi-layer structure. A dual damascene structure is formed on a substrate. The dual damascene structure has a metallization layer, a barrier layer, a sacrificial layer, and a hard mask layer. The sacrificial layer is made of a first sacrificial material having substantial thermal stability and decomposable by an electron beam. The sacrificial layer is removed by the electron beam to create the air gap between the barrier layer and the hard mask layer.

Abstract: Treatment of dielectric material includes using a directed energy to break bonds in a dielectric material and a reactive gas to repair those bonds with an element of the reactive gas. The treated dielectric material may exhibit greater mechanical strength without a significantly greater dielectric constant. A treatment reactor including a directed energy source apparatus and a delivery mechanism to deliver the reactive gas is also described.

Abstract: Described is a method and apparatus for altering the top surface of a metal interconnect. In one embodiment of the invention, a metal interconnect and a barrier layer are formed into an interlaver dielectric (ILD) and the metal interconnect and the barrier layer are planarized to the top of the ILD. The top surfaces of the metal interconnect, the barrier layer, and the ILD are altered with a second metal to form an electromigration barrier. In one embodiment of the invention, the second metal is prevented from contaminating the electrical resistivity of the metal interconnect.

Abstract: Described is a method and apparatus for altering the top surface of a metal interconnect. In one embodiment of the invention, a metal interconnect and a barrier layer are formed into an interlayer dielectric (ILD) and the metal interconnect and the barrier layer are planarized to the top of the ILD. The top surfaces of the metal interconnect, the barrier layer, and the ILD are altered with a second metal to form an electromigration barrier. In one embodiment of the invention, the second metal is prevented from contaminating the electrical resistivity of the metal interconnect.

Abstract: In an embodiment, a trench is formed above a via from a photo resist (PR) trench pattern in a dielectric layer. The trench is defined by two sidewall portions and base portions. The base portions of the sidewalls are locally treated by a post treatment using the PR trench pattern as mask to enhance mechanical strength of portions of the dielectric layer underneath the base portions. Seed and barrier layers are deposited on the trench and the via. The trench and via are filled with a metal layer. In another embodiment, a trench is formed from a PR trench pattern in a dielectric layer. A pillar PR is deposited and etched to define a pillar opening having a pillar surface. The pillar opening is locally treated on the pillar surface by a post treatment to enhance mechanical strength of portion of the dielectric layer underneath the pillar surface.

Abstract: Described is a method and apparatus for forming interconnects with a metal-metal oxide electromigration barrier and etch-stop. In one embodiment of the invention, the method includes depositing a metal layer on the top of a planarized interconnect layer, the interconnect layer having an interlayer dielectric (ILD) with a top that is planar with the top of an electrically conductive interconnect. In one embodiment of the invention, the method includes reacting the metal layer with the ILD to form a metal oxide layer on the top of the ILD. At the same time, the metal layer will not be significantly oxidized by the electrically conductive interconnect, thus forming a metal barrier on the electrically conductive interconnect to improve electromigration performance. The metal barrier and metal oxide layer together comprise a protective layer. A second ILD may be subsequently formed on the protective layer, and the protective layer may act an etch-stop during a subsequent etch of the second ILD.

Abstract: The present invention includes an embodiment that relates to method of forming an interconnect. The method includes the effect of reducing electromigration in a metallization. An article achieved by the inventive method includes a first interconnect disposed above a substrate; a first conductive diffusion barrier layer disposed above and on the first interconnect; an upper interconnect, that is either landed or unlanded and that is disposed above the first interconnect; and an upper conductive diffusion barrier layer disposed above and on the upper interconnect.

Abstract: The present invention discloses a method including providing a substrate; forming a dielectric over the substrate, the dielectric having a k value of about 2.5 or lower, the dielectric having a Young's modulus of elasticity of about 15 GigaPascals or higher; forming an opening in the dielectric; and forming a conductor in the opening.

Abstract: A method for making a semiconductor device is described. That method includes forming a sacrificial layer on a substrate, then forming a layer of photoresist on the sacrificial layer. After the photoresist layer is patterned, to form a patterned photoresist layer that has a first opening, part of the sacrificial layer is removed to generate an etched sacrificial layer that has a second opening that is substantially smaller than the first opening.

Abstract: A method to improve nucleation and/or adhesion of a CVD or ALD-deposited film/layer onto a low-dielectric constant (low-k) dielectric layer, such as a polymeric dielectric or a carbon-doped oxide. In an embodiment, the method includes providing a substrate into a deposition chamber. A dielectric layer having a reactive component is formed over the substrate. The formed dielectric layer having the reactive component is then processed to produce polar groups or polar sites at least on a surface of the formed dielectric layer.