Abstract: The present application discloses an integrated circuit having a power controller that can manage power modes of a system when the system is in a low power mode. According to an embodiment, a power controller is built into an input/output (I/O) region of and integrated circuit die, wherein the I/O region is outside the main logic area of the die. The same supply voltage that powers the I/O region of the device can power the power controller. The power controller can operate to transition the integrated circuit die between power modes by transitioning logic modules of the integrated circuit between power states without intervention by the logic modules.

Abstract: The present application discloses an integrated circuit having a power controller that can manage power modes of a system when the system is in a low power mode. According to an embodiment, a power controller is built into an input/output (I/O) region of and integrated circuit die, wherein the I/O region is outside the main logic area of the die. The same supply voltage that powers the I/O region of the device can power the power controller. The power controller can operate to transition the integrated circuit die between power modes by transitioning logic modules of the integrated circuit between power states without intervention by the logic modules.

Abstract: A method of error correction includes retrieving raw data from a memory device during a first operational phase of the error correction device. The raw data is retrieved by a bus interface device that interfaces with a variety of memory devices. During a second operational phase, the raw data is outputted from the bus interface device to the bus master. In addition, error correction data is calculated, and error correction is performed on the raw data during the second operational phase. By retrieving the raw data before performing error correction, and by outputting the raw data during the same operational phase, data may be retrieved from the memory more rapidly.