Patents by Inventor Jim C. Tso

Jim C. Tso has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DRAM power management with self-refresh
    Patent number: 5365487
    Abstract: A DRAM furnishes power management circuits that remove power from circuits on the DRAM that are not necessary for self-refresh and that turn on and off other circuits necessary for self-refresh in timed relation to the refresh cycle. The power management circuits include a counter and simple decoder circuits that decode the binary output of the counter.
    Type: Grant
    Filed: March 24, 1992
    Date of Patent: November 15, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Vipul C. Patel, David R. Brown, Jim C. Tso
  • Method and apparatus for implementing .times.2 parity DRAM for 16 bit systems from .times.4 parity DRAM
    Patent number: 5287311
    Abstract: A 1M.times.2 parity DRAM is salvaged from a defective 1M.times.4 parity DRAM having two or less unrepairable memory quadrants. Circuits are designed so "any" combination of 2 good quadrants can be accessed as a result of fuse blowing and steering logic which is controlled by the fuse signals.
    Type: Grant
    Filed: May 31, 1991
    Date of Patent: February 15, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Jim C. Tso, Vipul Patel, Kenneth A. Poteet