Patents by Inventor Jin-Hee Ma
Jin-Hee Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240176339Abstract: In a method of predicting an optimal process condition model for a semiconductor fabrication process, process parameter information of a unit process in the semiconductor fabrication process may be collected. First characteristics information of objects to be processed before the unit process and second characteristic information of processed objects after the unit process may be extracted. Process global uniformity (PGU) may be calculated using the first characteristic information and the second characteristic information. A data set of the unit process may be created using the process parameter information and the PGU. A virtual process environment function of the unit process may be created using the data set. The optimal process condition model of the unit process may be created using the virtual process environment function.Type: ApplicationFiled: April 3, 2023Publication date: May 30, 2024Inventors: Jin Hee HAN, Seong Min MA, Deuk Nyeon LEE, Chang Hwan LEE
-
Publication number: 20230153019Abstract: Disclosed is an operation method including generating RAID parity data based on first data in response to an RAID enable request and a first write request, the RAID enable request and the first write request being received from an external host, the RAID enable request including a first stream identifier and a RAID enable indication, and the first write request including the first stream identifier and the first data, storing the first data and the RAID parity data based on the first stream identifier, storing second data based on a second stream identifier in response to receiving a second write request from the external host, the second write request including the second stream identifier and the second data, and receiving an RAID disable request from the external host, the RAID disable request including the first stream identifier and a RAID disable indication.Type: ApplicationFiled: July 14, 2022Publication date: May 18, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Jin-Hee MA, Duckho BAE, Youngjin YU
-
Patent number: 11625330Abstract: A storage device includes a nonvolatile memory device, a memory controller, and a buffer memory. The memory controller determines a first memory block of the nonvolatile memory device, which is targeted for a read reclaim operation, and reads target data from a target area of the first memory block. The target data are stored in the buffer memory. The memory controller reads at least a portion of the target data stored in the buffer memory in response to a read request corresponding to at least a portion of the target area.Type: GrantFiled: March 7, 2022Date of Patent: April 11, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-Hee Ma, Sukhee Lee, Jisoo Kim
-
Patent number: 11579779Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.Type: GrantFiled: August 18, 2021Date of Patent: February 14, 2023Inventors: Jin-Hee Ma, Sungkug Cho, Sang-Hoon Choi
-
Publication number: 20220188236Abstract: A storage device includes a nonvolatile memory device, a memory controller, and a buffer memory. The memory controller determines a first memory block of the nonvolatile memory device, which is targeted for a read reclaim operation, and reads target data from a target area of the first memory block. The target data are stored in the buffer memory. The memory controller reads at least a portion of the target data stored in the buffer memory in response to a read request corresponding to at least a portion of the target area.Type: ApplicationFiled: March 7, 2022Publication date: June 16, 2022Inventors: JIN-HEE MA, SUKHEE LEE, JISOO KIM
-
Patent number: 11301388Abstract: A storage device includes a nonvolatile memory device, a memory controller, and a buffer memory. The memory controller determines a first memory block of the nonvolatile memory device, which is targeted for a read reclaim operation, and reads target data from a target area of the first memory block. The target data are stored in the buffer memory. The memory controller reads at least a portion of the target data stored in the buffer memory in response to a read request corresponding to at least a portion of the target area.Type: GrantFiled: July 9, 2019Date of Patent: April 12, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-Hee Ma, Sukhee Lee, Jisoo Kim
-
Publication number: 20210382635Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.Type: ApplicationFiled: August 18, 2021Publication date: December 9, 2021Inventors: JIN-HEE MA, SUNGKUG CHO, SANG-HOON CHOI
-
Patent number: 11157180Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.Type: GrantFiled: February 25, 2020Date of Patent: October 26, 2021Inventors: Jin-Hee Ma, Sungkug Cho, Sang-Hoon Choi
-
Publication number: 20200192584Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.Type: ApplicationFiled: February 25, 2020Publication date: June 18, 2020Inventors: Jin-Hee Ma, Sungkug Cho, Sang-Hoon Choi
-
Publication number: 20200110708Abstract: A storage device includes a nonvolatile memory device, a memory controller, and a buffer memory. The memory controller determines a first memory block of the nonvolatile memory device, which is targeted for a read reclaim operation, and reads target data from a target area of the first memory block. The target data are stored in the buffer memory. The memory controller reads at least a portion of the target data stored in the buffer memory in response to a read request corresponding to at least a portion of the target area.Type: ApplicationFiled: July 9, 2019Publication date: April 9, 2020Inventors: JIN-HEE MA, SUKHEE LEE, JISOO KIM
-
Patent number: 10592130Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.Type: GrantFiled: May 26, 2017Date of Patent: March 17, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-Hee Ma, Sungkug Cho, Sang-Hoon Choi
-
Publication number: 20180088841Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.Type: ApplicationFiled: May 26, 2017Publication date: March 29, 2018Inventors: JIN-HEE MA, SUNGKUG CHO, SANG-HOON CHOI
-
Patent number: 9318216Abstract: A multilevel cell (MLC) nonvolatile memory system including a plurality of memory cells each cell storing first bit data and second bit data, and a controller programming the plurality of memory cells on a page-by-page basis, the controller programming original data to an original block and programming copy data that is the same as the original data to a mirroring block, wherein first bit page data and second bit page data of the original data are programmed to memory cells connected to the same word line, but the first bit page data and second bit page data of the copy data are programmed to memory cells connected to different word lines.Type: GrantFiled: March 13, 2013Date of Patent: April 19, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jin-Hee Ma, Da-Woon Jung, Byung-Hei Jun
-
Publication number: 20150277792Abstract: A method of controlling a non-volatile memory device comprises detecting a bad page in a first block of the non-volatile memory device, and as a consequence of detecting the bad page, copying meta data stored in valid pages of the first block and original meta data corresponding to the bad page, programming the copied meta data to a second block of the non-volatile memory device, erasing the first block, and thereafter programming user data in the first block.Type: ApplicationFiled: July 23, 2014Publication date: October 1, 2015Inventors: JIN-HEE MA, SE-HWAN LEE, DA-WOON JUNG, MOON-WOOK OH
-
Publication number: 20140208002Abstract: A multilevel cell (MLC) nonvolatile memory system including a plurality of memory cells each cell storing first bit data and second bit data, and a controller programming the plurality of memory cells on a page-by-page basis, the controller programming original data to an original block and programming copy data that is the same as the original data to a mirroring block, wherein first bit page data and second bit page data of the original data are programmed to memory cells connected to the same word line, but the first bit page data and second bit page data of the copy data are programmed to memory cells connected to different word lines.Type: ApplicationFiled: March 13, 2013Publication date: July 24, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Jin-Hee Ma, Da-Woon Jung, Byung-Hei Jun