Patents by Inventor Jin-Lian Su

Jin-Lian Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9362384
    Abstract: The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: a first conductive type substrate, a second conductive type high voltage well, a gate, a first conductive type body region, a second conductive type source, a second conductive type drain, a first conductive type body electrode, and a first conductive type floating region. The floating region is formed in the body region, which is electrically floating and is electrically isolated from the source and the gate, such that the electrostatic discharge (ESD) effect is mitigated.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: June 7, 2016
    Assignee: Richtek Technology Corporation
    Inventors: Tzu-Cheng Kao, Jian-Hsing Lee, Jin-Lian Su, Huan-Ping Chu, Hung-Der Su
  • Patent number: 9018070
    Abstract: The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: April 28, 2015
    Assignee: Richtek Technology Corporation, R.O.C.
    Inventors: Tsung-Yi Huang, Jin-Lian Su
  • Publication number: 20150079755
    Abstract: The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: a first conductive type substrate, a second conductive type high voltage well, a gate, a first conductive type body region, a second conductive type source, a second conductive type drain, a first conductive type body electrode, and a first conductive type floating region. The floating region is formed in the body region, which is electrically floating and is electrically isolated from the source and the gate, such that the electrostatic discharge (ESD) effect is mitigated.
    Type: Application
    Filed: December 3, 2014
    Publication date: March 19, 2015
    Applicant: RICHTEK TECHNOLOGY CORPORATION, R.O.C
    Inventors: Tzu-Cheng Kao, Jian-Hsing Lee, Jin-Lian Su, Huan-Ping Chu, Hung-Der Su
  • Patent number: 8928078
    Abstract: The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: a first conductive type substrate, a second conductive type high voltage well, a gate, a first conductive type body region, a second conductive type source, a second conductive type drain, a first conductive type body electrode, and a first conductive type floating region. The floating region is formed in the body region, which is electrically floating and is electrically isolated from the source and the gate, such that the electrostatic discharge (ESD) effect is mitigated.
    Type: Grant
    Filed: December 25, 2012
    Date of Patent: January 6, 2015
    Assignee: Richtek Technology Corporation, R.O.C.
    Inventors: Tzu-Cheng Kao, Jian-Hsing Lee, Jin-Lian Su, Huan-Ping Chu, Hung-Der Su
  • Publication number: 20140377940
    Abstract: The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.
    Type: Application
    Filed: September 10, 2014
    Publication date: December 25, 2014
    Applicant: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Tsung-Yi Huang, Jin-Lian Su
  • Patent number: 8860082
    Abstract: The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.
    Type: Grant
    Filed: July 15, 2012
    Date of Patent: October 14, 2014
    Assignee: Richtek Technology Corporation, R.O.C.
    Inventors: Tsung-Yi Huang, Jin-Lian Su
  • Publication number: 20140175545
    Abstract: The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: a first conductive type substrate, a second conductive type high voltage well, a gate, a first conductive type body region, a second conductive type source, a second conductive type drain, a first conductive type body electrode, and a first conductive type floating region. The floating region is formed in the body region, which is electrically floating and is electrically isolated from the source and the gate, such that the electrostatic discharge (ESD) effect is mitigated.
    Type: Application
    Filed: December 25, 2012
    Publication date: June 26, 2014
    Inventors: Tzu-Cheng Kao, Jian-Hsing Lee, Jin-Lian Su, Huan-Ping Chu, Hung-Der Su
  • Publication number: 20140015008
    Abstract: The present invention discloses a transient voltage suppressor (TVS) circuit, and a diode device therefor and a manufacturing method thereof. The TVS circuit is for coupling to a protected circuit to limit amplitude of a transient voltage which is inputted to the protected circuit. The TVS circuit includes a suppressor device and at least a diode device. The diode device is formed in a substrate, which includes: a well formed in the substrate; a separation region formed beneath the upper surface; a anode region and a cathode region, which are formed at two sides of the separation region beneath the upper surface respectively, wherein the anode region and the cathode region are separated by the separation region; and a buried layer, which is formed in the substrate below the well with a higher impurity density and a same conductive type as the well.
    Type: Application
    Filed: July 15, 2012
    Publication date: January 16, 2014
    Inventors: Tsung-Yi Huang, Jin-Lian Su
  • Publication number: 20120161235
    Abstract: The present invention discloses an electrostatic discharge protection device and a manufacturing method thereof. The electrostatic discharge protection device includes: a substrate, a gate, two N type lightly doped drains, an N type source, an N type drain, and two N type doped regions extending downward beneath and in contact with the source and drain respectively, such that when the source and drain are conducted with each other, at least part of the current flows through the two downwardly extending doped regions to increase the electrostatic discharge protection voltage of the electrostatic discharge protection device.
    Type: Application
    Filed: October 15, 2011
    Publication date: June 28, 2012
    Inventors: Tsung-Yi Huang, Jin-Lian Su
  • Publication number: 20120161236
    Abstract: The present invention discloses an electrostatic discharge protection device and a manufacturing method thereof. The electrostatic discharge protection device includes: a substrate, a gate, two N type lightly doped drains, an N type source, an N type drain, and two N type doped regions extending downward beneath and in contact with the source and drain respectively, such that when the source and drain are conducted with each other, at least part of the current flows through the two downwardly extending doped regions to increase the electrostatic discharge protection voltage of the electrostatic discharge protection device.
    Type: Application
    Filed: November 29, 2011
    Publication date: June 28, 2012
    Inventors: Tsung-Yi Huang, Jin-Lian Su