Abstract: A stage structure for a semiconductor fabrication process is disclosed. The stage structure may include a stage and a pickup head tilting control device. The pickup head tilting control device may include a correction plate, a tilting driving device which is coupled to the correction plate and is configured to adjust an inclination angle of the correction plate, and a control circuitry configured to control the tilting driving device. The correction plate may include a correction surface which is selectively in contact with a suction surface of a pickup head.

Abstract: A semiconductor package may include a first semiconductor chip, a second semiconductor chip on the first semiconductor chip, and an adhesive layer between the first semiconductor chip and the second semiconductor chip. The first semiconductor chip may include a semiconductor substrate and a plurality of protection layers on the semiconductor substrate. The topmost layer of the protection layers may have a top surface with convex portions and concave portions, and the convex portions and the concave portions may be in contact with the adhesive layer.

Abstract: A stage structure for a semiconductor fabrication process is disclosed. The stage structure may include a stage and a pickup head tilting control device. The pickup head tilting control device may include a correction plate, a tilting driving device which is coupled to the correction plate and is configured to adjust an inclination angle of the correction plate, and a control circuitry configured to control the tilting driving device. The correction plate may include a correction surface which is selectively in contact with a suction surface of a pickup head.

Abstract: A semiconductor package may include a first semiconductor chip, a second semiconductor chip on the first semiconductor chip, and an adhesive layer between the first semiconductor chip and the second semiconductor chip. The first semiconductor chip may include a semiconductor substrate and a plurality of protection layers on the semiconductor substrate. The topmost layer of the protection layers may have a top surface with convex portions and concave portions, and the convex portions and the concave portions may be in contact with the adhesive layer.

Abstract: A printed circuit board (PCB) prevents damage to tabs of the PCB and pins of a slot by reducing insertion force when the PCB is inserted in the slot. The PCB includes a body portion including a first surface and a second surface and a metal interconnection layer formed on at least one of the first and second surfaces. The metal interconnecting layer includes tabs formed along a first edge of the body portion. An insertion force alleviation portion in which at least a portion of the body portion is removed is formed in the first edge to reduce the insertion force required to seat the PCB within the slot.

Abstract: A semiconductor package module including a self-assembled organic molecule layer and a method of manufacturing the semiconductor package module is provided. The semiconductor package module may include a module printed circuit board (PCB) having a plurality of metal line patterns and a plurality of mounting pads formed thereon. The semiconductor package may further include an insulation thin film self-assembled on at least one metal line pattern selected from among the plurality of metal line patterns. In order to manufacture the semiconductor package module, the insulation thin film is formed in a manner that the plurality of metal line patterns are formed on the module PCB wherein a plurality of via holes are formed, and then an organic compound is self-assembled on a surface of at least one metal line pattern selected from the plurality of metal line patterns.

Abstract: A reprocessing method of a semiconductor device, the reprocessing method includes adjusting a resistance value of a first resistor by first trimming the first resistor, wherein the first resistor is electrically connected between a first pad and a second pad, forming a second resistor on the first trimmed first resistor, and adjusting a resistance value of the second resistor by second trimming the second resistor.

Abstract: A memory module may include a module substrate having a side portion. The side portion may be adapted or configured to be inserted into a socket of a main board. A plurality of connection pads may be arranged along the side portion. The connection pads may have a step portion of a first height from a surface of the side portion and a contact portion of a second height that is greater than the first height from the surface of the side portion. At least one semiconductor package may be mounted on the module substrate and electrically connected to the connection pads.

Abstract: A printed circuit board (PCB) prevents damage to tabs of the PCB and pins of a slot by reducing insertion force when the PCB is inserted in the slot. The PCB includes a body portion including a first surface and a second surface and a metal interconnection layer formed on at least one of the first and second surfaces. The metal interconnecting layer includes tabs formed along a first edge of the body portion. An insertion force alleviation portion in which at least a portion of the body portion is removed is formed in the first edge to reduce the insertion force required to seat the PCB within the slot.

Abstract: A reprocessing method of a semiconductor device, the reprocessing method includes adjusting a resistance value of a first resistor by first trimming the first resistor, wherein the first resistor is electrically connected between a first pad and a second pad, forming a second resistor on the first trimmed first resistor, and adjusting a resistance value of the second resistor by second trimming the second resistor.

Abstract: A working panel includes first array board patterns arranged in a first region and including first and second guide bar patterns facing each other and N first unit board patterns, where N is a natural number greater than or equal to 2, positioned between the first and second guide bar patterns, and second array board patterns including third and fourth guide bar patterns facing each other, and M second unit board patterns, where 1?M<N, positioned between the third and fourth guide bar patterns.

Abstract: A memory module may include a module substrate having a side portion. The side portion may be adapted or configured to be inserted into a socket of a main board. A plurality of connection pads may be arranged along the side portion. The connection pads may have a step portion of a first height from a surface of the side portion and a contact portion of a second height that is greater than the first height from the surface of the side portion. At least one semiconductor package may be mounted on the module substrate and electrically connected to the connection pads.

Abstract: A semiconductor package module including a self-assembled organic molecule layer and a method of manufacturing the semiconductor package module is provided. The semiconductor package module may include a module printed circuit board (PCB) having a plurality of metal line patterns and a plurality of mounting pads formed thereon. The semiconductor package may further include an insulation thin film self-assembled on at least one metal line pattern selected from among the plurality of metal line patterns. In order to manufacture the semiconductor package module, the insulation thin film is formed in a manner that the plurality of metal line patterns are formed on the module PCB wherein a plurality of via holes are formed, and then an organic compound is self-assembled on a surface of at least one metal line pattern selected from the plurality of metal line patterns.