Patents by Inventor Jin-Yang Lee
Jin-Yang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11948559Abstract: Various embodiments include methods and devices for implementing automatic grammar augmentation for improving voice command recognition accuracy in systems with a small footprint acoustic model. Alternative expressions that may capture acoustic model decoding variations may be added to a grammar set. An acoustic model-specific statistical pronunciation dictionary may be derived by running the acoustic model through a large general speech dataset and constructing a command-specific candidate set containing potential grammar expressions. Greedy based and cross-entropy-method (CEM) based algorithms may be utilized to search the candidate set for augmentations with improved recognition accuracy.Type: GrantFiled: March 21, 2022Date of Patent: April 2, 2024Assignee: QUALCOMM IncorporatedInventors: Yang Yang, Anusha Lalitha, Jin Won Lee, Christopher Lott
-
Publication number: 20240095645Abstract: A method of generating customizable goal representation is disclosed. A request from a user to view a goal representation is received. A flexible goal ontology is accessed that comprises one or more goal entities, one or more goal relationships between the goal entities, or one or more goal properties, the one or more goal properties including one or more metadata attributes relating to the one or more goal entities. A set of mapping rules is obtained that defines mappings between one or more goals. The set of mapping rules is evaluated to assemble a customized goal representation tailored to the user. The customized goal representation is updated based on a revaluation of the mapping rules affected by changes to the one or more goal entities, the one or more goal relationships, or the one or more properties.Type: ApplicationFiled: September 21, 2023Publication date: March 21, 2024Inventors: Sven Martin Andreas Elfgren, Friedrich I. Riha, Elliot Piersa Dahl, Eric Koslow, Nicole Jensen McMullin, Natasha Hede, Connie Lynn Chen, Alexa Jean Kriebel, Chije Wang'ati, JR., Megan McGowan, Ami Tushar Bhatt, Jeffrey Ryan Gurr, Tyler Kowalewski, Rahul Rangnekar, Byron Sha Yang, Jerry Wu, Ricky Rizal Zein, Romain Beauxis, Adnan Chowdhury, Priya Balasubramanian, Gilles Yvetot, Shaylan Hawthorne, Adnan Pirzada, Matthew Michael Parides, Jenna Nicole Soojin Lee, Ian William Richard, Laura Elizabeth Pearson, Christian Nguyen, Tovin Thomas, Adam Carter, David Achee, David Christopher Sally, Miranda Howitt, Vincent Yao, Seth Goldenberg, Aimee Jin Peng, William Qingdong Yan, Matthew Stephen Wysocki, Michael Ryan Shohoney, Ryan Maas, Asha Camper Singh, Leonardo Faria, Elliot Piersa Dahl
-
Patent number: 8487452Abstract: A semiconductor package includes a substrate, a first semiconductor chip stacked on the substrate and a second semiconductor chip stacked on the first semiconductor chip. In the semiconductor package, the second semiconductor chip is rotated to be stacked on the first semiconductor chip. The semiconductor package is used in an electronic system.Type: GrantFiled: July 1, 2011Date of Patent: July 16, 2013Assignee: SAMSUNG Electronics Co., Ltd.Inventors: Jin-Yang Lee, Chan-Min Han, Kil-Soo Kim
-
Publication number: 20120001347Abstract: A semiconductor package includes a substrate, a first semiconductor chip stacked on the substrate and a second semiconductor chip stacked on the first semiconductor chip. In the semiconductor package, the second semiconductor chip is rotated to be stacked on the first semiconductor chip. The semiconductor package is used in an electronic system.Type: ApplicationFiled: July 1, 2011Publication date: January 5, 2012Applicant: Samsung Electronics Co., Ltd.Inventors: Jin-Yang LEE, Chan-Min HAN, Kil-Soo KIM
-
Publication number: 20090130908Abstract: In a memory module, a gap filler for eliminating an air gap may be formed on an end of a PCB where a tab may be formed. The gap filler may be formed on a surface of a socket receiving the memory module. A grease may be coated on the tab to provide a heat conduction path away from the memory module.Type: ApplicationFiled: December 29, 2008Publication date: May 21, 2009Inventors: Sang-Wook Park, Joong-Hyun Baek, Hae-Hyung Lee, Hee-Kook Choi, Jin-Yang Lee
-
Patent number: 7485006Abstract: In a memory module, a gap filler for eliminating an air gap may be formed on an end of a PCB where a tab may be formed. The gap filler may be formed on a surface of a socket receiving the memory module. A grease may be coated on the tab to provide a heat conduction path away from the memory module.Type: GrantFiled: March 30, 2005Date of Patent: February 3, 2009Assignee: Samsung Electronics Co. Ltd.Inventors: Sang-Wook Park, Joong-Hyun Baek, Hae-Hyung Lee, Hee-Kook Choi, Jin-Yang Lee
-
Publication number: 20080144292Abstract: A semiconductor module, including a semiconductor device mounted on a printed circuit board (PCB), the PCB having an electrical connection to the semiconductor module, and a heat sink in direct contact with the semiconductor device, the heat sink being formed with a first end and a second end, the first end and the second end being formed with different heights, wherein the semiconductor module allows air flow to pass through the semiconductor module, radiating heat away from the heat sink. Another semiconductor module, including a semiconductor device mounted on a PCB, a heat sink in direct contact with the semiconductor device, the heat sink having a first portion and a second portion, wherein the first portion has a flat shape and is in direct contact with the semiconductor device and the second portion has a corrugated shape and is not in contact with the semiconductor device, wherein the semiconductor module allows air flow to pass through the semiconductor module, radiating heat away from the heat sink.Type: ApplicationFiled: January 22, 2008Publication date: June 19, 2008Inventors: Hae-Hyung Lee, Sang-Wook Park, Joong-Hyun Baek, Jin-Yang Lee
-
Patent number: 7345882Abstract: A semiconductor module, including a semiconductor device mounted on a printed circuit board (PCB), the PCB having an electrical connection to the semiconductor module, and a heat sink in direct contact with the semiconductor device, the heat sink being formed with a first end and a second end, the first end and the second end being formed with different heights, wherein the semiconductor module allows air flow to pass through the semiconductor module, radiating heat away from the heat sink. Another semiconductor module, including a semiconductor device mounted on a PCB, a heat sink in direct contact with the semiconductor device, the heat sink having a first portion and a second portion, wherein the first portion has a flat shape and is in direct contact with the semiconductor device and the second portion has a corrugated shape and is not in contact with the semiconductor device, wherein the semiconductor module allows air flow to pass through the semiconductor module, radiating heat away from the heat sink.Type: GrantFiled: October 6, 2004Date of Patent: March 18, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Hae-Hyung Lee, Sang-Wook Park, Joong-Hyun Baek, Jin-Yang Lee
-
Patent number: 7301233Abstract: The semiconductor chip package may include a substrate having circuit patterns and substrate pads connected with the circuit patterns. At least one semiconductor chip is mounted on the substrate, and a thermoelectric cooler having a P-type material plate and an N-type material plate is mounted on the semiconductor chip. Portions of the P-type and N-type material plates may be attached on the semiconductor chip. The P-type and N-type material plates may be electrically connected to the circuit patterns of the substrate to be provided with DC power.Type: GrantFiled: June 30, 2005Date of Patent: November 27, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Hae-Hyung Lee, Sang-Wook Park, Joong-Hyun Baek, Dong-Ho Lee, Jin-Yang Lee
-
Publication number: 20060006517Abstract: A multi-chip package having a heat dissipating path. The multi-chip package includes a stack of integrated circuit (IC) chips, a heat sink part interposed between the IC chips so that one end portion of the heat sink part can be exposed from a side of the stack of integrated circuit chips, a substrate on which the stack of integrated circuit chips is mounted, and solder or solder ball-shaped thermally connecting parts to thermally connect the exposed end portion of the heat sink part to the substrate to dissipate heat collected in the heat sink part through the substrate.Type: ApplicationFiled: July 6, 2005Publication date: January 12, 2006Inventors: Jin-Yang Lee, Sang-Wook Park, Hae-Hyung Lee, Dong-Ho Lee, Joong-Hyun Baek
-
Publication number: 20060001140Abstract: The semiconductor chip package may include a substrate having circuit patterns and substrate pads connected with the circuit patterns. At least one semiconductor chip is mounted on the substrate, and a thermoelectric cooler having a P-type material plate and an N-type material plate is mounted on the semiconductor chip. Portions of the P-type and N-type material plates may be attached on the semiconductor chip. The P-type and N-type material plates may be electrically connected to the circuit patterns of the substrate to be provided with DC power.Type: ApplicationFiled: June 30, 2005Publication date: January 5, 2006Inventors: Hae-Hyung Lee, Sang-Wook Park, Joong-Hyun Baek, Dong-Ho Lee, Jin-Yang Lee
-
Publication number: 20050245137Abstract: In a memory module, a gap filler for eliminating an air gap may be formed on an end of a PCB where a tab may be formed. The gap filler may be formed on a surface of a socket receiving the memory module. A grease may be coated on the tab to provide a heat conduction path away from the memory module.Type: ApplicationFiled: March 30, 2005Publication date: November 3, 2005Inventors: Sang-Wook Park, Joong-Hyun Baek, Hae-Hyung Lee, Hee-Kook Choi, Jin-Yang Lee
-
Publication number: 20050201063Abstract: A semiconductor module, including a semiconductor device mounted on a printed circuit board (PCB), the PCB having an electrical connection to the semiconductor module, and a heat sink in direct contact with the semiconductor device, the heat sink being formed with a first end and a second end, the first end and the second end being formed with different heights, wherein the semiconductor module allows air flow to pass through the semiconductor module, radiating heat away from the heat sink. Another semiconductor module, including a semiconductor device mounted on a PCB, a heat sink in direct contact with the semiconductor device, the heat sink having a first portion and a second portion, wherein the first portion has a flat shape and is in direct contact with the semiconductor device and the second portion has a corrugated shape and is not in contact with the semiconductor device, wherein the semiconductor module allows air flow to pass through the semiconductor module, radiating heat away from the heat sink.Type: ApplicationFiled: October 6, 2004Publication date: September 15, 2005Inventors: Hae-Hyung Lee, Sang-Wook Park, Joong-Hyun Baek, Jin-Yang Lee
-
Patent number: 6835598Abstract: A stacked semiconductor module includes a lower chip scale package (CSP) mounted on a module board, and an inverted upper CSP attached to the top of lower CSP to form a stacked semiconductor package. The lower and upper CSPs are electrically connected to each other outside of the stacked semiconductor package. This electrical connection may be made using the module board. Further, a conductive interconnection tape may be used to electrically connect the upper CSP to regions on the module board, which are electrically connected to the region at which the lower CSP is electrically connected to the module board.Type: GrantFiled: March 3, 2003Date of Patent: December 28, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Joong-hyun Baek, Jin-yang Lee, Yun-hyeok Im, Tae-koo Lee
-
Publication number: 20040018661Abstract: A stacked semiconductor module includes a lower chip scale package (CSP) mounted on a module board, and an inverted upper CSP attached to the top of lower CSP to form a stacked semiconductor package. The lower and upper CSPs are electrically connected to each other outside of the stacked semiconductor package. This electrical connection may be made using the module board. Further, a conductive interconnection tape may be used to electrically connect the upper CSP to regions on the module board, which are electrically connected to the region at which the lower CSP is electrically connected to the module board.Type: ApplicationFiled: March 3, 2003Publication date: January 29, 2004Inventors: Joong-Hyun Baek, Jin-Yang Lee, Yun-Hyeok Im, Tae-Koo Lee