Patents by Inventor Jingmin Leng
Jingmin Leng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240055265Abstract: A method and apparatus for forming a semiconductor device are provided. The method includes thermally treating a substrate having one or more silicon nanosheets formed thereon. Thermally treating the substrate includes positioning the substrate in a processing volume of a first processing chamber, the substrate having one or more silicon nanosheets formed thereon. Thermally treating the substrate further includes heating the substrate to a first temperature of more than about 250 degrees Celsius, generating hydrogen radicals using a remote plasma source fluidly coupled with the processing volume, and maintaining the substrate at the first temperature while concurrently exposing the one or more silicon nanosheets to the generated hydrogen radicals. The generated hydrogen radicals remove residual germanium from the one or more silicon nanosheets.Type: ApplicationFiled: August 11, 2022Publication date: February 15, 2024Inventors: Pradeep SAMPATH KUMAR, Norman L. TAM, Shashank SHARMA, Zhiming JIANG, Jingmin LENG, Victor CALDERON, Mahesh RAMAKRISHNA
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Publication number: 20230352349Abstract: Embodiments of the present technology may include semiconductor processing methods that include depositing a film of semiconductor material on a substrate in a substrate processing chamber. The deposited film may be sampled for defects at greater than or about two non-contiguous regions of the substrate with scanning electron microscopy. The defects that are detected and characterized may include those of a size less than or about 10 nm. The methods may further include calculating a total number of defects in the deposited film based on the sampling for defects in the greater than or about two non-contiguous regions of the substrate. At least one deposition parameter may be adjusted as a result of the calculation. The adjustment to the at least one deposition parameter may reduce the total number of defects in a deposition of the film of semiconductor material.Type: ApplicationFiled: July 10, 2023Publication date: November 2, 2023Applicant: Applied Materials, Inc.Inventors: Mandar B. Pandit, Man-Ping Cai, Wenhui Li, Michael Wenyoung Tsiang, Praket Prakash Jha, Jingmin Leng
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Patent number: 11699623Abstract: Embodiments of the present technology may include semiconductor processing methods that include depositing a film of semiconductor material on a substrate in a substrate processing chamber. The deposited film may be sampled for defects at greater than or about two non-contiguous regions of the substrate with scanning electron microscopy. The defects that are detected and characterized may include those of a size less than or about 10 nm. The methods may further include calculating a total number of defects in the deposited film based on the sampling for defects in the greater than or about two non-contiguous regions of the substrate. At least one deposition parameter may be adjusted as a result of the calculation. The adjustment to the at least one deposition parameter may reduce the total number of defects in a deposition of the film of semiconductor material.Type: GrantFiled: October 14, 2020Date of Patent: July 11, 2023Assignee: Applied Materials, Inc.Inventors: Mandar B. Pandit, Man-Ping Cai, Wenhui Li, Michael Wenyoung Tsiang, Praket Prakash Jha, Jingmin Leng
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Publication number: 20220115275Abstract: Embodiments of the present technology may include semiconductor processing methods that include depositing a film of semiconductor material on a substrate in a substrate processing chamber. The deposited film may be sampled for defects at greater than or about two non-contiguous regions of the substrate with scanning electron microscopy. The defects that are detected and characterized may include those of a size less than or about 10 nm. The methods may further include calculating a total number of defects in the deposited film based on the sampling for defects in the greater than or about two non-contiguous regions of the substrate. At least one deposition parameter may be adjusted as a result of the calculation. The adjustment to the at least one deposition parameter may reduce the total number of defects in a deposition of the film of semiconductor material.Type: ApplicationFiled: October 14, 2020Publication date: April 14, 2022Applicant: Applied Materials, Inc.Inventors: Mandar B. Pandit, Man-Ping Cai, Wenhui Li, Michael Wenyoung Tsiang, Praket Prakash Jha, Jingmin Leng
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Patent number: 7747424Abstract: A modeling approach is disclosed which addresses samples with different regions where the structures exhibit different periodicities. In this approach, a first partial model is generated which defines the shape, material properties and periodicity of the first region. In addition, a second partial model is generated defining the shape, material properties and periodicity of the second region. These two partial models are then merged into a combined model. When optimizing the combined model, the shape and material properties of the first and second models are independently adjusted. The optical responses of the model with differing shapes and material properties are-calculated and compared to a physical sample. This process is iteratively carried out to derive a final combined model that corresponds to a physical sample.Type: GrantFiled: March 8, 2007Date of Patent: June 29, 2010Assignee: KLA-Tencor CorporationInventors: Jon Opsal, Jingmin Leng
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Publication number: 20070219737Abstract: A modeling approach is disclosed which addresses samples with different regions where the structures exhibit different periodicities. In this approach, a first partial model is generated which defines the shape, material properties and periodicity of the first region. In addition, a second partial model is generated defining the shape, material properties and periodicity of the second region. These two partial models are then merged into a combined model. When optimizing the combined model, the shape and material properties of the first and second models are independently adjusted. The optical responses of the model with differing shapes and material properties are-calculated and compared to a physical sample. This process is iteratively carried out to derive a final combined model that corresponds to a physical sample.Type: ApplicationFiled: March 8, 2007Publication date: September 20, 2007Inventors: Jon Opsal, Jingmin Leng
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Patent number: 6465265Abstract: A method is described for analyzing and characterizing parameters of a semiconductor wafer. In particular, an approach is described for characterizing the interface layer between a thin oxide film and a silicon substrate in order to more accurately determine the characteristics of the sample. The wafer is inspected and a set of measured data is created. This measured data is compared with theoretical data generated based on a theoretical set of parameters as applied to a model representing the physical structure of the semiconductor. The model includes an interface layer, between the film layer and the silicon substrate, which includes a representation of the electronic structure of the underlying substrate. In the preferred embodiment, the representation is a five peak, critical point model influenced by the electronic transitions of the underlying silicon substrate.Type: GrantFiled: March 13, 2001Date of Patent: October 15, 2002Assignee: Therma-Wave, Inc.Inventors: Jon Opsal, Jingmin Leng
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Publication number: 20020045282Abstract: A method is described for analyzing and characterizing parameters of a semiconductor wafer. In particular, an approach is described for characterizing the interface layer between a thin oxide film and a silicon substrate in order to more accurately determine the characteristics of the sample. The wafer is inspected and a set of measured data is created. This measured data is compared with theoretical data generated based on a theoretical set of parameters as applied to a model representing the physical structure of the semiconductor. The model includes an interface layer, between the film layer and the silicon substrate, which includes a representation of the electronic structure of the underlying substrate. In the preferred embodiment, the representation is a five peak, critical point model influenced by the electronic transitions of the underlying silicon substrate.Type: ApplicationFiled: March 13, 2001Publication date: April 18, 2002Inventors: Jon Opsal, Jingmin Leng