Patents by Inventor Jingsheng J. Cong

Jingsheng J. Cong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9461649
    Abstract: A programmable logic circuit architecture using resistive memory elements. The proposed circuit architecture uses the conventional island-based Field Programmable Gate Array (FPGA) architecture, but with novel integration of CMOS-compatible resistive memory elements that can be programmed efficiently. In the proposed architecture, the programmable interconnects of FPGA are redesigned to use only resistive memory elements and metal wires. Then, the interconnects can be entirely fabricated over logic blocks to save area while keeping their architectural functions unchanged, and the programming transistors can be shared among resistive memory elements to save area. Finally, on-demand buffer insertion is proposed as the buffering solution to achieve more speedup.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: October 4, 2016
    Assignee: The Regents of the University of California
    Inventors: Jingsheng J. Cong, Bingjun Xiao
  • Publication number: 20150123706
    Abstract: A programmable logic circuit architecture using resistive memory elements. The proposed circuit architecture uses the conventional island-based Field Programmable Gate Array (FPGA) architecture, but with novel integration of CMOS-compatible resistive memory elements that can be programmed efficiently. In the proposed architecture, the programmable interconnects of FPGA are redesigned to use only resistive memory elements and metal wires. Then, the interconnects can be entirely fabricated over logic blocks to save area while keeping their architectural functions unchanged, and the programming transistors can be shared among resistive memory elements to save area. Finally, on-demand buffer insertion is proposed as the buffering solution to achieve more speedup.
    Type: Application
    Filed: June 3, 2013
    Publication date: May 7, 2015
    Applicant: The Regents of the University of California
    Inventors: Jingsheng J. Cong, Bingjun Xiao