Patents by Inventor Jingxue Lu

Jingxue Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11885836
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: January 30, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Ramkumar Sivakumar, Jingxue Lu, Sherif Galal, Xinwang Zhang, Kshitij Yadav
  • Publication number: 20230137935
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 4, 2023
    Inventors: Ramkumar SIVAKUMAR, Jingxue LU, Sherif GALAL, Xinwang ZHANG, Kshitij YADAV
  • Patent number: 11536749
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: December 27, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Ramkumar Sivakumar, Jingxue Lu, Sherif Galal, Xinwang Zhang, Kshitij Yadav
  • Patent number: 11271599
    Abstract: An envelope tracking system includes an envelope signal generator, a supply modulator coupled to the envelope signal generator, the supply modulator comprising a switching regulator path configured to provide an output voltage at an output node to a power amplifier when in an average power tracking (APT) mode, the switching regulator path configured to operate together with a linear path to provide the output voltage at the output node to the power amplifier when in an envelope tracking (ET) mode, a capacitor having a first and second terminal, the first terminal coupled to ground, a switch coupled between the output node and the second terminal of the capacitor, the switch being configured to selectively disconnect the capacitor from the output node, and a circuit coupled between the output node and the second terminal of the capacitor, the circuit comprising a bi-directional current-limiting switch, the circuit configured to charge or discharge the capacitor such that a voltage across the capacitor changes
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: March 8, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Iulian Mirea, Gerard James Wimpenny, Jingxue Lu, Jongshick Ahn
  • Patent number: 11258409
    Abstract: Aspects of the present disclosure provide a high voltage switch with a fast turn-off. An example power supply circuit generally includes a capacitive element for coupling to a power terminal of an amplifier, a first switch configured to be closed in a first mode and to be open in a second mode, a second switch coupled in series between the first switch and the capacitive element and configured to be closed in the first mode and to be open in the second mode, a first circuit coupled to the first switch and configured to charge the capacitive element and power the amplifier in the first mode, and a buffer circuit having an output coupled to a first node and configured to output a first voltage level greater than half of a second voltage level at a second node.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: February 22, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Justin Philpott, Xiaocheng Jing, Jingxue Lu, Iulian Mirea
  • Publication number: 20220021348
    Abstract: Aspects of the present disclosure provide a high voltage switch with a fast turn-off. An example power supply circuit generally includes a capacitive element for coupling to a power terminal of an amplifier, a first switch configured to be closed in a first mode and to be open in a second mode, a second switch coupled in series between the first switch and the capacitive element and configured to be closed in the first mode and to be open in the second mode, a first circuit coupled to the first switch and configured to charge the capacitive element and power the amplifier in the first mode, and a buffer circuit having an output coupled to a first node and configured to output a first voltage level greater than half of a second voltage level at a second node.
    Type: Application
    Filed: July 15, 2020
    Publication date: January 20, 2022
    Inventors: Justin PHILPOTT, Xiaocheng JING, Jingxue LU, Iulian MIREA
  • Publication number: 20210231710
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.
    Type: Application
    Filed: January 21, 2021
    Publication date: July 29, 2021
    Inventors: Ramkumar SIVAKUMAR, Jingxue LU, Sherif GALAL, Xinwang ZHANG, Kshitij YADAV
  • Publication number: 20210194517
    Abstract: An envelope tracking system includes an envelope signal generator, a supply modulator coupled to the envelope signal generator, the supply modulator comprising a switching regulator path configured to provide an output voltage at an output node to a power amplifier when in an average power tracking (APT) mode, the switching regulator path configured to operate together with a linear path to provide the output voltage at the output node to the power amplifier when in an envelope tracking (ET) mode, a capacitor having a first and second terminal, the first terminal coupled to ground, a switch coupled between the output node and the second terminal of the capacitor, the switch being configured to selectively disconnect the capacitor from the output node, and a circuit coupled between the output node and the second terminal of the capacitor, the circuit comprising a bi-directional current-limiting switch, the circuit configured to charge or discharge the capacitor such that a voltage across the capacitor changes
    Type: Application
    Filed: December 17, 2020
    Publication date: June 24, 2021
    Inventors: Iulian MIREA, Gerard James WIMPENNY, Jingxue LU, Jongshick AHN
  • Patent number: 10194234
    Abstract: An example apparatus includes an output jack including a ground pole and a power output pole, a power supply circuit configured to generate a power signal, a coupler circuit operably coupled to the ground pole and the power output pole of the output jack, such that the coupler circuit is configured to couple the power signal with a noise signal on the ground pole to generate a combined output signal on the power output pole.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: January 29, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Jingxue Lu, Vijayakumar Dhanasekaran, Meysam Azin, Arash Mashayekhi, Kshitij Yadav
  • Patent number: 10164650
    Abstract: A system and method for pulse-width modulation (PWM) mismatch shaping. The method includes receiving a multi-bit pulse-code modulated (PCM) signal and generating a voltage ramp signal. The method includes generating a first corrected signal based on a first feedback signal and the multi-bit PCM signal. The method includes generating a first single-bit PWM signal based on the first corrected signal and the voltage ramp signal. The method includes delaying the voltage-ramp signal and generating a second corrected signal based on a second feedback signal and the multi-bit PCM signal. The method includes generating a second single-bit PWM signal based on the second corrected signal and the delayed voltage ramp signal and generating a multi-bit pulse-density modulation (PDM) signal based on the first single-bit PWM signal and the second single-bit PWM signal.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: December 25, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Jingxue Lu, Matthew Sienko
  • Publication number: 20180352321
    Abstract: An example apparatus includes an output jack including a ground pole and a power output pole, a power supply circuit configured to generate a power signal, a coupler circuit operably coupled to the ground pole and the power output pole of the output jack, such that the coupler circuit is configured to couple the power signal with a noise signal on the ground pole to generate a combined output signal on the power output pole.
    Type: Application
    Filed: June 5, 2017
    Publication date: December 6, 2018
    Inventors: Jingxue LU, Vijayakumar DHANASEKARAN, Meysam AZIN, Arash MASHAYEKHI, Kshitij YADAV
  • Publication number: 20180234101
    Abstract: A system and method for pulse-width modulation (PWM) mismatch shaping. The method includes receiving a multi-bit pulse-code modulated (PCM) signal and generating a voltage ramp signal. The method includes generating a first corrected signal based on a first feedback signal and the multi-bit PCM signal. The method includes generating a first single-bit PWM signal based on the first corrected signal and the voltage ramp signal. The method includes delaying the voltage-ramp signal and generating a second corrected signal based on a second feedback signal and the multi-bit PCM signal. The method includes generating a second single-bit PWM signal based on the second corrected signal and the delayed voltage ramp signal and generating a multi-bit pulse-density modulation (PDM) signal based on the first single-bit PWM signal and the second single-bit PWM signal.
    Type: Application
    Filed: February 16, 2017
    Publication date: August 16, 2018
    Inventors: Jingxue Lu, Matthew Sienko
  • Publication number: 20180146276
    Abstract: An accessory device, configured to be interfaced with a master device, and configured to operate in an analog mode and in a digital mode, the accessory device including: a startup circuit including: a first transistor that interfaces the accessory device to the master device, wherein the first transistor is configured with a first resistive capacitive (RC) circuit to turn on the first transistor according to a time constant of the first RC circuit; a second transistor coupled between ground and the first RC circuit, wherein the second transistor is configured to control a gate of the first transistor in response to a control signal; and a diode having an anode coupled to the first node and a cathode coupled to a body terminal of the first transistor.
    Type: Application
    Filed: March 28, 2017
    Publication date: May 24, 2018
    Inventors: Meysam Azin, Hui-ya Liao Nelson, Mark Cherry, Jingxue Lu
  • Patent number: 9800214
    Abstract: Embodiments contained in the disclosure provide a method of cancelling power supply noise that affects the output of a class-D audio amplifier. The method begins when an alternating current (AC) coupled signal is input into an inverting amplifier. That signal is then amplified in the inverting amplifier. The amplified AC coupled signal is then feed through a resistor capacitor (RC) network, and from the RC network to an inverting input of the inverting amplifier. The output of a high pass filter is used to cancel the power supply ripple signal as the output of the high pass filter is injected into a supply voltage line. The cancelling signal is opposite in magnitude to the power supply ripple signal. The apparatus includes an inverting amplifier, a capacitor for coupling to an AC signal, and a resistor, in combination with the capacitor.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: October 24, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Jingxue Lu
  • Patent number: 9749739
    Abstract: A method of protecting a speaker from thermal damage includes determining a first load current through a first resistor that is coupled to the speaker. The method also includes converting the first load current to a digital value using a second load current through a second resistor as a reference input. The second resistor is part of a circuit that reduces an effect of a temperature coefficient of resistance of the first resistor. The method also includes comparing the digital value of the first load current to a threshold value. The method further includes, responsive to the first load current being larger than the threshold value, generating an instruction to take an action to protect the speaker.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: August 29, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Zhilong Tang, Jingxue Lu
  • Publication number: 20170085986
    Abstract: A method of protecting a speaker from thermal damage includes determining a first load current through a first resistor that is coupled to the speaker. The method also includes converting the first load current to a digital value using a second load current through a second resistor as a reference input. The second resistor is part of a circuit that reduces an effect of a temperature coefficient of resistance of the first resistor. The method also includes comparing the digital value of the first load current to a threshold value. The method further includes, responsive to the first load current being larger than the threshold value, generating an instruction to take an action to protect the speaker.
    Type: Application
    Filed: September 18, 2015
    Publication date: March 23, 2017
    Inventors: Zhilong Tang, Jingxue Lu
  • Patent number: 9602062
    Abstract: A switching amplifier includes a compensation circuit to compensate for DC offset in the amplifier, to enhance operation of the switching amplifier. The compensation circuit may comprise a SAR ADC, where the DAC element can be used to provide a compensation voltage. The switching amplifier may further include a PWM modulator configured to avoid cross-talk to further enhance operation of the switching amplifier.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: March 21, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Jingxue Lu, Ankit Srivastava, Matthew David Sienko, Manu Mishra, Sheng Zhang
  • Publication number: 20160294337
    Abstract: Embodiments contained in the disclosure provide a method of cancelling power supply noise that affects the output of a class-D audio amplifier. The method begins when an alternating current (AC) coupled signal is input into an inverting amplifier. That signal is then amplified in the inverting amplifier. The amplified AC coupled signal is then feed through a resistor capacitor (RC) network, and from the RC network to an inverting input of the inverting amplifier. The output of a high pass filter is used to cancel the power supply ripple signal as the output of the high pass filter is injected into a supply voltage line. The cancelling signal is opposite in magnitude to the power supply ripple signal. The apparatus includes an inverting amplifier, a capacitor for coupling to an AC signal, and a resistor, in combination with the capacitor.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 6, 2016
    Inventor: Jingxue Lu
  • Patent number: 9461589
    Abstract: Disclosed is an amplifier circuit having an output stage that includes an H-bridge circuit. The H-bridge circuit includes sense resistors on one side of the circuit. A current detection circuit can produce an output indicative of current flow through a load based on voltages across the sense resistors.
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: October 4, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Jingxue Lu, Ankit Srivastava, Haibo Fei
  • Patent number: 9461595
    Abstract: An apparatus includes voltage-to-current conversion circuitry comprising a first voltage-to-current converter and a second voltage-to-current converter. The apparatus also includes a capacitor coupled to the first voltage-to-current converter and to the second voltage-to-current converter.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: October 4, 2016
    Assignee: QUALCOMM INCOPORATED
    Inventors: Jingxue Lu, Matthew David Sienko, Ankit Srivastava, Manu Mishra