Patents by Inventor Jingyi Xu

Jingyi Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210028649
    Abstract: A display panel and a method for fabricating the same, and a display device and a method for charging the same are provided. The display panel includes: an array substrate; an opposite substrate arranged opposite to the array substrate; a charging coil located between the array substrate and the opposite substrate, wherein the charging coil is configured to generate electrical energy through electromagnetic induction. In this way, a battery for charging the battery is integrated inside the display panel to thereby make the display panel thin and lightweight.
    Type: Application
    Filed: October 17, 2018
    Publication date: January 28, 2021
    Inventors: Yanwei REN, Jingyi XU, Min LIU, Ruize JIANG, Yanan YU
  • Publication number: 20200411562
    Abstract: The present disclosure provides an array substrate and a fabrication method thereof, a display panel and a display module. The array substrate has a display region and a bonding region for bonding with a circuit board, and including: a data line and a gate line in the display region; and a bump unit in the bonding region. The bump unit includes: a gate line bump layer, which is in a same layer and made of a same material as the gate line, is connected to the data line, and includes a main body portion and a plurality of hollowed-out portions in the main body portion; and a data line bump layer, which is in a same layer and made of a same material as the data line, and covers the main body portion and the plurality of hollowed-out portions of the gate line bump layer.
    Type: Application
    Filed: June 29, 2020
    Publication date: December 31, 2020
    Inventors: Shuai HAN, Jingyi XU, Xin ZHAO, Wulijibaier TANG, Yanwei REN, Yanan YU, Yuelin WANG, Guolei ZHI
  • Publication number: 20200353723
    Abstract: The present disclosure is directed to a retort pouch. In an embodiment, the retort pouch includes a multilayer film with at least three layers. The at least three layers include (A) a skin layer comprising a blend of a propylene-based polymer and a styrenic block copolymer, (B) a seal layer comprising blend of a propylene-based polymer and a styrenic block copolymer, and (C) a core layer located between the skin layer (A) and the seal layer (B). The core layer comprises a blend of (1) a propylene-based polymer, (2) an ethylene-based polymer, and (3) a crystalline block composite (CBC).
    Type: Application
    Filed: September 28, 2016
    Publication date: November 12, 2020
    Inventors: Hang Lu, Joy Jingyi Xu, Yutaka Maehara, Jian-ping Pan, Xiao Bing Yun
  • Patent number: 10825807
    Abstract: An electrostatic protection circuit, an array substrate, a display panel and a display device are disclosed. The electrostatic protection circuit is located within a peripheral region of an array substrate and includes: a first ground wire provided in a same layer as a source electrode and a drain electrode of a thin film transistor located within a display region of the array substrate; and a second ground wire provided in a same layer as a gate electrode of the thin film transistor, wherein, the first ground wire forms a first loop with a printed circuit board provided within the peripheral region, the first loop surrounds the display region; the second ground wire forms a second loop with the printed circuit board, and the second loop surrounds the display region.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: November 3, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Yanwei Ren, Jingyi Xu, Kunpeng Zhang, Yu Liu, Min Liu, Ruiying Tian
  • Publication number: 20200312217
    Abstract: The present disclosure provides an array substrate and a display device for reducing the space occupied by the antenna inside the mobile phone, so as to reduce the thickness of the mobile phone and make the mobile phone thinner and lighter. The array substrate according to the present disclosure includes dummy signal lines and a conductive portion. The dummy signal lines and the conductive portion are disposed in different layers. An insulating layer is disposed between the dummy signal lines and the conductive portion. A via is disposed on the insulating layer. The dummy signal line is connected to the conductive portion through the via. The dummy signal line and the conductive portion are used to form an antenna.
    Type: Application
    Filed: September 20, 2018
    Publication date: October 1, 2020
    Inventors: Yanwei REN, Yezhou FANG, Jingyi XU, Xin ZHAO, Min LIU, Chaochao SUN
  • Publication number: 20200272267
    Abstract: Disclosed is a touch display panel, a display device and a method for manufacturing a touch display panel. The touch display panel includes a ground wire and a switching element. The ground wire is configured to allow static electricity in the touch display panel to be discharged through the ground wire. The switching element is configured to be turned on or turned off according to an operating state of the touch display panel to control whether the static electricity is discharged through the ground wire.
    Type: Application
    Filed: March 12, 2019
    Publication date: August 27, 2020
    Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jingyi XU, Yuelin WANG, Guangshuai WANG, Yanwei REN, Peirong HUO, Xintong FAN, Jinyu CHAO
  • Patent number: 10757848
    Abstract: A display device and a method for manufacturing the display device are disclosed. An edge region of the display panel of the display device includes a first region in which an exposed connection line pattern is provided and a second region in which no connection line pattern is provided, and an electrostatic layer is attached to the edge region; wherein the electrostatic shielding layer comprises an insulating material region and a conductive material region, the insulating material region contacting the first region and the conductive material region contacting the second region.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: August 25, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Jingyi Xu, Xin Li, Kunpeng Zhang, Yi Fan, Yanwei Ren, Yanyan Zhao, Yu Liu
  • Patent number: 10700105
    Abstract: An array substrate, a method for manufacturing an array substrate, a display panel and a display device are provided. The array substrate includes: a base substrate including a display area and a non-display area; a dummy data line in the non-display area of the base substrate; and an effective data line in the non-display area of the base substrate. The dummy data line is closer to an edge of the base substrate than the effective data line, and a width of the dummy data line is greater than a width of the effective data line.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: June 30, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Yanfeng Li, Yanan Yu, Jingyi Xu, Xin Zhao, Xiaokang Wang, Yanwei Ren, Wei Li
  • Publication number: 20200203336
    Abstract: An electrostatic protection circuit, an array substrate, a display panel and a display device are disclosed. The electrostatic protection circuit is located within a peripheral region of an array substrate and includes: a first ground wire provided in a same layer as a source electrode and a drain electrode of a thin film transistor located within a display region of the array substrate; and a second ground wire provided in a same layer as a gate electrode of the thin film transistor, wherein, the first ground wire forms a first loop with a printed circuit board provided within the peripheral region, the first loop surrounds the display region; the second ground wire forms a second loop with the printed circuit board, and the second loop surrounds the display region.
    Type: Application
    Filed: August 3, 2017
    Publication date: June 25, 2020
    Applicants: Boe Technology Group Co., Ltd., Ordos Yuansheng Optoelectronics Co., Ltd.
    Inventors: Yanwei REN, Jingyi XU, Kunpeng ZHANG, Yu LIU, Min LIU, Ruiying TIAN
  • Publication number: 20200168639
    Abstract: An array substrate which includes a display region and a peripheral region surrounding the display region, the peripheral region includes a data line lead region and a driving circuit region, and the data line lead region is between the driving circuit region and the display region; the driving circuit region includes a driving circuit, the data line lead region includes a the plurality of data line leads, and the plurality of data line leads extend from the display region and are electrically connected with the driving circuit; and the data line lead region includes peripheral data line leads, a region of the peripheral region close to the peripheral data line leads includes at least one retaining wall configured to prevent plasma from affecting the peripheral data line leads. A method for fabricating an array substrate, a display panel, and a display device are also disclosed.
    Type: Application
    Filed: March 13, 2019
    Publication date: May 28, 2020
    Inventors: Yanan YU, Jingyi XU, Yanwei REN, Xin ZHAO, Xiaokang WANG, Yuelin WANG, Huijie ZHANG
  • Publication number: 20200075581
    Abstract: A display substrate comprises a display area and a non-display area around the display area; at least one ground terminal located in the non-display area; a first wiring disposed in the non-display area and being around the display area; and a second wiring disposed between the first wiring and the display area and being positioned around the non-display area. The second wiring is provided with at least one tip on a side closer to the first wiring, the at least one tip pointing to the side of the first wiring. The first wiring and the second wiring are respectively connected to the at least one ground terminal.
    Type: Application
    Filed: June 6, 2019
    Publication date: March 5, 2020
    Inventors: Yanwei REN, Jingyi XU, Wulijibaier TANG, Tianlei SHI, Min LIU, Peng LIU
  • Publication number: 20200040442
    Abstract: The present invention provides multilayer structures and articles formed from such structures. In one aspect, a multilayer structure comprises (a) a biaxially oriented polyethylene film comprising an outer layer that comprises a first polyethylene composition comprising at least two linear low density polyethylenes, wherein the first polyethylene composition has a density of 0.910 to 0.940 g/cm3, an MWHDE>95 greater than 135 kg/mol and an IHDE>95 greater than 42 kg/mol, wherein the film has a thickness of 10 to 60 microns after orientation; and (b) a metal layer comprising a metal deposited on the outer layer, wherein the metal comprises Al, Zn, Au, Ag, Cu, Ni, Cr, Ge, Se, Ti, Sn, or oxides thereof, and wherein the multilayer structure has an optical density of 1.0 to 3.
    Type: Application
    Filed: April 23, 2018
    Publication date: February 6, 2020
    Inventors: Gang Wang, Jingyi Xu, Jianping Pan, Xiao Bing Yun
  • Patent number: 10532508
    Abstract: A sealing device for sealing a venting port of an extrusion apparatus. The sealing device includes a saddle having a saddle counter bore and a seal ring positioned in the saddle counter bore of the saddle. The sealing device also includes a barrel counter bore provided in a barrel of the extrusion apparatus. The saddle counter bore and the barrel counter bore are dimensioned to receive the seal ring, wherein when the seal ring is positioned in the saddle counter bore and the barrel counter bore, a seal is formed between the seal ring in all range of processing temperatures, the saddle and the barrel to prevent the unwanted leakage of high pressure melt.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: January 14, 2020
    Assignee: Graham Engineering Corporation
    Inventor: Jingyi Xu
  • Patent number: 10504938
    Abstract: The present application provides an array substrate and a method of manufacturing the same. The array substrate includes a first substrate having a drain electrode protruding from a side of the first substrate; a planarization layer at the side of the first substrate where the drain electrode protrudes, the planarization layer being provided with a stepped hole on the drain electrode, and a diameter of the stepped hole decreasing along a direction from a side of the planarization layer facing away the first substrate towards a side of the planarization layer facing the first substrate; a pixel electrode at the stepped hole and connected with the drain electrode; a passivation layer covering the planarization layer and the pixel electrode; and a common electrode on the passivation layer.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: December 10, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Yuelin Wang, Yanyan Zhao, Jingyi Xu, Lei Li, Yezhou Fang, Tienan Liu, Yanwei Ren, Yishan Fu, Weida Qin
  • Publication number: 20190318682
    Abstract: The present disclosure provides an array substrate and a display device for reducing the space occupied by the antenna inside the mobile phone, so as to reduce the thickness of the mobile phone and make the mobile phone thinner and lighter. The array substrate according to the present disclosure includes dummy signal lines and a conductive portion. The dummy signal lines and the conductive portion are disposed in different layers. An insulating layer is disposed between the dummy signal lines and the conductive portion. A via is disposed on the insulating layer. The dummy signal line is connected to the conductive portion through the via. The dummy signal line and the conductive portion are used to form an antenna.
    Type: Application
    Filed: September 20, 2018
    Publication date: October 17, 2019
    Inventors: Yanwei REN, Yezhou FANG, Jingyi XU, Xin ZHAO, Min LIU, Chaochao SUN
  • Publication number: 20190304925
    Abstract: An array substrate, a display device and a method for manufacturing the array substrate are provided. The array substrate includes a display region and a peripheral wiring region, wherein the array substrate includes: a base substrate; a peripheral circuit in the peripheral wiring region and on the base substrate; and an electrostatic shielding layer on a side of the peripheral circuit away from the base substrate.
    Type: Application
    Filed: October 1, 2018
    Publication date: October 3, 2019
    Inventors: Yanyan Zhao, Fuqiang Tang, Jingyi Xu, Yuelin Wang, Yezhou Fang
  • Patent number: 10379396
    Abstract: The present disclosure discloses a display panel and a display device. The display panel includes an array substrate and an opposite substrate arranged opposite to each other; the array substrate includes a box alignment area facing the opposite substrate, a circuit test area located on a side of the box alignment area; the opposite substrate includes a base substrate, a conductive black matrix arranged on a side of the base substrate facing the array substrate; the display panel further includes an electrostatic discharging layer electrically connected respectively with the conductive black matrix and a GND wire in the circuit test area; the conductive black matrix is provided with a thickened area in at least an area in contact with the electrostatic discharging layer; a thickness of the thickened area of the conductive black matrix is more than a thickness of other areas of the conductive black matrix.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: August 13, 2019
    Assignees: BOE Technology Group Co, Ltd., Ordos Yuansheng Optoelectronics Co, Ltd.
    Inventors: Yanyan Zhao, Jingyi Xu, Fuqiang Tang, Yanwei Ren, Kunpeng Zhang, Yu Liu, Yuelin Wang
  • Publication number: 20190204970
    Abstract: An array substrate, a touch display panel and a display device are provided. The array substrate includes: a common electrode and a conductive pattern which are on a base substrate, the common electrode includes a plurality of common electrode blocks arranged in an array; the conductive pattern includes a plurality of groups of connecting wires; each group of connecting wires is configured to electrically connect a touch driving circuit with one common electrode block; each group of connecting wires includes at least one conducting wire; each conducting wire includes a first conductive wire segment located in a lead region and a second conductive wire segment located in a connecting region and configured to connect the first conductive wire segment with the common electrode block; for each common electrode block group, the length of the second conductive wire segment is negatively correlated with the length of the first conductive wire segment.
    Type: Application
    Filed: October 25, 2018
    Publication date: July 4, 2019
    Inventors: Peirong Huo, Zhiqiang Wang, Jingyi Xu, Fang Yan
  • Publication number: 20190164997
    Abstract: An array substrate, a method for manufacturing an array substrate, a display panel and a display device are provided. The array substrate includes: a base substrate including a display area and a non-display area; a dummy data line in the non-display area of the base substrate; and an effective data line in the non-display area of the base substrate. The dummy data line is closer to an edge of the base substrate than the effective data line, and a width of the dummy data line is greater than a width of the effective data line.
    Type: Application
    Filed: September 14, 2018
    Publication date: May 30, 2019
    Inventors: Yanfeng Li, Yanan Yu, Jingyi Xu, Xin Zhao, Xiaokang Wang, Yanwei Ren, Wei Li
  • Publication number: 20190057985
    Abstract: The present application provides an array substrate and a method of manufacturing the same. The array substrate includes a first substrate having a drain electrode protruding from a side of the first substrate; a planarization layer at the side of the first substrate where the drain electrode protrudes, the planarization layer being provided with a stepped hole on the drain electrode, and a diameter of the stepped hole decreasing along a direction from a side of the planarization layer facing away the first substrate towards a side of the planarization layer facing the first substrate; a pixel electrode at the stepped hole and connected with the drain electrode; a passivation layer covering the planarization layer and the pixel electrode; and a common electrode on the passivation layer.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 21, 2019
    Inventors: Yuelin WANG, Yanyan ZHAO, Jingyi XU, Lei LI, Yezhou FANG, Tienan LIU, Yanwei REN, Yishan FU, Weida QIN