Patents by Inventor Jinhee HONG

Jinhee HONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230215829
    Abstract: A semiconductor package includes a lower semiconductor chip, a first upper semiconductor chip including upper pads, and bonding wires coupled to the substrate and the upper pads. The first upper semiconductor chip has a first overhang region adjacent to a first lateral surface of the first upper semiconductor chip, a second overhang region adjacent to a second lateral surface of the first upper semiconductor chip, and a first corner overhang region adjacent to a corner where the first and second lateral surfaces meet with each other. The upper pads include first upper pads on the first overhang region and second upper pads on the second overhang region. The number of the first upper pads is less than that of the second upper pads. The upper pads are spaced apart from the first corner overhang region.
    Type: Application
    Filed: August 25, 2022
    Publication date: July 6, 2023
    Inventors: JINHEE HONG, JINMO KWON
  • Publication number: 20220199505
    Abstract: A semiconductor device includes a substrate comprising a redistribution layer, a ball land provided on a bottom surface of the redistribution layer, a passivation layer surrounding the ball land on the bottom surface of the redistribution layer and spaced apart from the ball land by a space region formed between the passivation layer and the ball land, and a signal wiring line provided in the redistribution layer on the ball land, a semiconductor chip mounted on the substrate, and an external terminal adhered to the ball land. The signal wiring line includes a first wiring pattern extending in a first direction perpendicular to one side surface of the semiconductor chip, and a support pattern disposed under the one side surface of the semiconductor chip. A second width of the support pattern in a second direction is greater than a first width of the wiring pattern in the second direction.
    Type: Application
    Filed: September 13, 2021
    Publication date: June 23, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: DONGUK KIM, JINHEE HONG, JINMO KWON
  • Patent number: 9947644
    Abstract: A semiconductor package is provided. The semiconductor package may include a plurality of memory chips, which are mounted on a top surface of a package substrate, and a plurality of controller chips, which are vertically stacked on at least one of top and bottom surfaces of the package substrate.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: April 17, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jinhee Hong, Wansoo Park, Chul Park
  • Publication number: 20170170156
    Abstract: A semiconductor package is provided. The semiconductor package may include a plurality of memory chips, which are mounted on a top surface of a package substrate, and a plurality of controller chips, which are vertically stacked on at least one of top and bottom surfaces of the package substrate.
    Type: Application
    Filed: September 19, 2016
    Publication date: June 15, 2017
    Inventors: Jinhee HONG, Wansoo PARK, Chul PARK