Abstract: The present invention relates to a technical idea for providing a delivery service on regular and irregular roads using autonomous vehicles. More specifically, the present invention relates to technology in which, on a regular road, a lead vehicle and at least one droid vehicle are coupled to each other and a delivery service is provided based on autonomous driving; and on an irregular road, the coupling between the lead vehicle and the droid vehicle is automatically released and the droid vehicle provides a delivery service by remotely controlling the driving of the droid vehicle by the lead vehicle in the last mile delivery section corresponding to the irregular road.

Abstract: Disclosed is an organic light-emitting display device having a touchscreen in which the configuration of a pad unit and a circuit board connected to the pad unit is simplified, resulting in bonding stability and an improved form factor of the device, and a method of manufacturing the same. In the organic light-emitting display device having the touchscreen in which a touch electrode is directly provided on an encapsulation layer, a touch pad and a display pad are disposed parallel to each other on the same side so as to be connected to a flexible printed circuit board with a difference in height therebetween. Thereby, increased bonding reliability and an increased effective display area are achieved.

Abstract: Disclosed is an organic light-emitting display device having a touchscreen in which the configuration of a pad unit and a circuit board connected to the pad unit is simplified, resulting in bonding stability and an improved form factor of the device, and a method of manufacturing the same. In the organic light-emitting display device having the touchscreen in which a touch electrode is directly provided on an encapsulation layer, a touch pad and a display pad are disposed parallel to each other on the same side so as to be connected to a flexible printed circuit board with a difference in height therebetween. Thereby, increased bonding reliability and an increased effective display area are achieved.

Abstract: Disclosed is an organic light-emitting display device having a touchscreen in which the configuration of a pad unit and a circuit board connected to the pad unit is simplified, resulting in bonding stability and an improved form factor of the device, and a method of manufacturing the same. In the organic light-emitting display device having the touchscreen in which a touch electrode is directly provided on an encapsulation layer, a touch pad and a display pad are disposed parallel to each other on the same side so as to be connected to a flexible printed circuit board with a difference in height therebetween. Thereby, increased bonding reliability and an increased effective display area are achieved.

Abstract: Disclosed is an organic light-emitting display device having a touchscreen in which the configuration of a pad unit and a circuit board connected to the pad unit is simplified, resulting in bonding stability and an improved form factor of the device, and a method of manufacturing the same. In the organic light-emitting display device having the touchscreen in which a touch electrode is directly provided on an encapsulation layer, a touch pad and a display pad are disposed parallel to each other on the same side so as to be connected to a flexible printed circuit board with a difference in height therebetween. Thereby, increased bonding reliability and an increased effective display area are achieved.

Abstract: Disclosed is an organic light-emitting display device having a touchscreen in which the configuration of a pad unit and a circuit board connected to the pad unit is simplified, resulting in bonding stability and an improved form factor of the device, and a method of manufacturing the same. In the organic light-emitting display device having the touchscreen in which a touch electrode is directly provided on an encapsulation layer, a touch pad and a display pad are disposed parallel to each other on the same side so as to be connected to a flexible printed circuit board with a difference in height therebetween. Thereby, increased bonding reliability and an increased effective display area are achieved.

Abstract: Disclosed is an organic light-emitting display device having a touchscreen in which the configuration of a pad unit and a circuit board connected to the pad unit is simplified, resulting in bonding stability and an improved form factor of the device, and a method of manufacturing the same. In the organic light-emitting display device having the touchscreen in which a touch electrode is directly provided on an encapsulation layer, a touch pad and a display pad are disposed parallel to each other on the same side so as to be connected to a flexible printed circuit board with a difference in height therebetween. Thereby, increased bonding reliability and an increased effective display area are achieved.

Abstract: A system on a chip (SoC) device verification system comprises: an SoC device model including one or more IPs and a memory controller; an external IP verification model receiving an instruction from the SoC device model and verifying operation of the one or more IPs included in the SoC device model; and a bus select model selecting one of the external IP verification model and an external device in response to a memory control signal received from the memory controller of the SoC device model.

Abstract: Provided are a system in package (SIP) semiconductor device suitable for efficient power management, and a method of managing power of the SIP semiconductor device. The SIP semiconductor device includes chips including first and second chips. Each of the chips includes an alive block, a local interface, and an intellectual property (IP) block. The alive block is continuously supplied with power in order to continuously be in an on-state. The local interface transmits/receives data to/from other chips. The IP block individually stores and processes data. The alive blocks of the chips are connected to each other through a first signal line unit for transmitting a signal required to wake up or initialize the chips. The alive blocks control power to the chips, respectively, in response to an external wake-up instruction signal or the signal transmitted through the first signal line unit.

Abstract: An interface device transforms data to a packet and inverts at least a portion of the packet to reduce a number of bit toggles at corresponding locations in a previous packet. A reverse bit appended to the packet indicates whether the packet is inverted. A transmission packet including the reverse bit and the portion of the packet inverted according to a state of the reverse bit is transmitted, and the data are recovered from a received packet, the portion of which that was inverted is inverted again according to the state of the reverse bit.

Abstract: A pin configuration changing circuit of a base chip includes pin configuration changing register (PCCR) and a pin configuration changing logic unit (PCCLU). The PCCR stores and provides a pin connection assignment value indicating a first connection order of a plurality of pins included in a memory connected to the base chip, based on a type of the memory when the memory is changed. The PCCLU receives the pin connection assignment value and changes a second connection order of a plurality of inner pins of the base chip. Various memories can be connected to the base chip without extra wiring or a printed circuit board (PCB).

Abstract: A system on a chip (SoC) device verification system comprises: an SoC device model including one or more IPs and a memory controller; an external IP verification model receiving an instruction from the SoC device model and verifying operation of the one or more IPs included in the SoC device model; and a bus select model selecting one of the external IP verification model and an external device in response to a memory control signal received from the memory controller of the SoC device model.

Abstract: A pin configuration changing circuit of a base chip includes pin configuration changing register (PCCR) and a pin configuration changing logic unit (PCCLU). The PCCR stores and provides a pin connection assignment value indicating a first connection order of a plurality of pins included in a memory connected to the base chip, based on a type of the memory when the memory is changed. The PCCLU receives the pin connection assignment value and changes a second connection order of a plurality of inner pins of the base chip. Various memories can be connected to the base chip without extra wiring or a printed circuit board (PCB).

Abstract: An interface device transforms data to a packet and inverts at least a portion of the packet to reduce a number of bit toggles at corresponding locations in a previous packet. A reverse bit appended to the packet indicates whether the packet is inverted. A transmission packet including the reverse bit and the portion of the packet inverted according to a state of the reverse bit is transmitted, and the data are recovered from a received packet, the portion of which that was inverted is inverted again according to the state of the reverse bit.

Abstract: A system has a first chip using a first bus matrix, and a second chip including second and third bus matrixes connected to the first bus matrix. The second bus matrix is connected to a plurality of bus masters of the second chip and the third bus matrix is connected to a plurality of bus slaves of the second chip.

Abstract: Provided are a system in package (SIP) semiconductor device suitable for efficient power management, and a method of managing power of the SIP semiconductor device. The SIP semiconductor device includes chips including first and second chips. Each of the chips includes an alive block, a local interface, and an intellectual property (IP) block. The alive block is continuously supplied with power in order to continuously be in an on-state. The local interface transmits/receives data to/from other chips. The IP block individually stores and processes data. The alive blocks of the chips are connected to each other through a first signal line unit for transmitting a signal required to wake up or initialize the chips. The alive blocks control power to the chips, respectively, in response to an external wake-up instruction signal or the signal transmitted through the first signal line unit.

Abstract: A data processing system comprising a central processing unit (CPU), a memory management unit (MMU), and a translation table emulation module (TTE). The CPU outputs a virtual address. The MMU generates a translation table address corresponding to the virtual address and transforms the virtual address into a physical address from a descriptor. The TTE receives the translation table address and generates the descriptor needed to map the virtual address to the physical address.

Abstract: Provided are an embedded micro computer unit (MCU) using a memory emulation module and a method of testing the embedded MCU. The embedded MCU includes an internal memory that is connected to bus master devices for storing temporary data of the bus master devices and a test vector in a test mode, a memory controller for accessing the internal memory or an external memory when a processor core is operated, and a memory emulation module that is connected between the memory controller and the internal memory for storing the test vector in the internal memory in the test mode.

Abstract: A PCB having a card slot receiving a card provided with signal input/output pins and a circuit element to provide extended capability is inserted, and having data transmission pins, a power pin and a ground pin in correspondence to the signal input/output pins, comprises an electronic device internally provided for impedance matching with the card, and having a first end connected to one of the data transmission pins and a second end connected to one of the power pin and the ground pin. With this configuration, a card slot internally comprises an electronic device for impedance matching, so that a space of the PCB can be efficiently utilized.

Abstract: An embedded controller includes a central processing unit, a memory interface for interface with an external memory, and a function block or peripheral device with a register for storing operation state information. The peripheral device includes a detection circuit, a storage unit, for example in the form of a FIFO, a multiplexer, and a direct memory access (DMA) controller. The state detection circuit activates a flag signal whenever the operation state information of the register is varied, and the FIFO stores the operation state information from the register in response to the flag signal. The multiplexer is controlled by the DMA controller and transmits the operation state information of the FIFO to an internal bus. As a result, the operation state information of the FIFO is stored in the external memory through the memory interface.