Abstract: The present disclosure relates to a display panel. The display panel includes a display substrate, an opposite substrate, and a first adhesive layer and light guide layer located between the display substrate and the opposite substrate and stacked on each other. The first adhesive layer includes a photo-cured layer formed by curing a photocurable material layer. And the light guide layer is used to direct light to the photocurable material layer during the curing to form the cured layer.

Abstract: A Printed Circuit Board (PCB) or substrate has a bump pad layer and a separate trace metal layer. The bump pad layer substantially covers or overlays the trace metal layer. A first surface of a bump pad in the bump pad layer is electrically coupled to a trace in the trace metal layer. A second surface of the bump pad in the bump pad layer extends above a surface of the bump pad layer. When a component is mounted on the substrate during a component mounting process, a pillar or other electrical connection mechanism of the component is electrically coupled to the bump pad without the risk of solder non-wetting and/or the formation of solder bridges between traces and bump pads on the substrate.

Abstract: A semiconductor device includes a first semiconductor die having a top planar surface and a second semiconductor die having a bottom planar surface and a top planar surface. A protective layer including a bottom planar surface and a top planar surface is positioned between the first semiconductor die and the second semiconductor die. An adhesive layer having a top planar surface and a bottom planar surface is between the protective layer and the second semiconductor die. A periphery of the top planar surface of the first semiconductor die is covered by a periphery of the bottom planar surface of the protective layer after cutting a portion of the protective layer that extended past the periphery of the surface of the first semiconductor die. The protective layer reduces the occurrence of peeling of the second semiconductor die and first semiconductor die coupled to the protective layer.

Abstract: A memory card includes a memory card body dimensioned to house at least one integrated circuit die package. The memory card body, in certain embodiments, includes a first surface spaced apart from a second surface and a plurality of side surfaces connecting the first surface to the second surface. The memory card also includes a contact pad disposed on at least one side surface of the plurality of side surfaces. The contact pad includes a first conductive layer, a second conductive layer, and an insulating layer disposed between the first conductive layer and the second conductive layer.

Abstract: Devices and methods are described for reducing etching due to galvanic effect within a printed circuit board that may be used, for example, in a data storage device, such as a card-type data storage device. Specifically, a contact trace is coupled to a contact finger that has a substantially larger surface area than the contact trance, and that is configured to couple the data storage device to a host device. The contact trace is electrically isolated from the rest of the circuitry during a fabrication process. The contact finger and an exposed portion of the contact trace are plated with a common material to reduce galvanic etching of the contact trace during fabrication. The contact trace is then connected to an impedance trace though at least one of a component and a bond wire.

Abstract: A memory card includes a memory card body dimensioned to house at least one integrated circuit die package. The memory card body, in certain embodiments, includes a first surface spaced apart from a second surface and a plurality of side surfaces connecting the first surface to the second surface. The memory card also includes a contact pad disposed on at least one side surface of the plurality of side surfaces. The contact pad includes a first conductive layer, a second conductive layer, and an insulating layer disposed between the first conductive layer and the second conductive layer.

Abstract: A tool is disclosed for separating a semiconductor die from a tape to which the die is affixed during the wafer dicing process. The tool includes a pick-up arm for positioning a vacuum tip over a semiconductor die to be removed. The vacuum tip includes a non-uniform array of vacuum holes to grip the semiconductor wafer.

Abstract: A system is disclosed for separating a semiconductor die from a tape to which the die is affixed during the wafer dicing process. The system includes a pick-up arm for positioning a vacuum tip over a semiconductor die to be removed. The vacuum tip includes a non-uniform array of vacuum holes to grip the semiconductor wafer.