Abstract: An analog signal processing circuit can include a front-stage processing module configured to process an analog signal to generate a first differential signal; at least one switched capacitor circuit, coupled with the front-stage processing module to receive the first differential signal, and configured to integrate or sample and hold the first differential signal to generate a second differential signal; and where the front-stage processing module and the at least one switched capacitor circuit receive synchronous control signals, the front-stage processing module chops the analog signal according to the control signals, and the at least one switched capacitor circuit is in different operating modes at a first phase and a second phase of an operation cycle of the control signals, in order to eliminate DC offset voltages of the front-stage processing module and the at least one switched capacitor circuit.

Abstract: An integrator and an analog-to-digital converter are provided. The analog-to-digital converter includes the integrator, a comparison circuit and a control logic circuit. The integrator includes an operational amplifier, offset capacitors, input capacitors, integral capacitors and controllable switches. The input capacitors and the integral capacitors are connected to the operational amplifier via controllable switches, so that the integrator operates in various operation modes. Operation states of the offset capacitors in a first phase and a second phase of an operation cycle are controlled by switching on or off the controllable switches. Therefore, an offset voltage of the integrator is eliminated, and conversion efficiency and conversion accuracy of the analog-to-digital converter is improved.

Abstract: An integrator and an analog-to-digital converter are provided. The analog-to-digital converter includes the integrator, a comparison circuit and a control logic circuit. The integrator includes an operational amplifier, offset capacitors, input capacitors, integral capacitors and controllable switches. The input capacitors and the integral capacitors are connected to the operational amplifier via controllable switches, so that the integrator operates in various operation modes. Operation states of the offset capacitors in a first phase and a second phase of an operation cycle are controlled by switching on or off the controllable switches. Therefore, an offset voltage of the integrator is eliminated, and conversion efficiency and conversion accuracy of the analog-to-digital converter is improved.

Abstract: An infrared focal plane readout integrated circuit that includes a unit bias circuit, an integrating circuit, and an on-chip analog-to-digital conversion circuit, where the integrating circuit includes a first switch tube, a second switch tube, and an integrating capacitor; an output end of the unit bias circuit is connected to an input end of the first switch tube; an input end of the second switch tube is connected to a set terminal; both an output end of the first switch tube and an output end of the second switch tube are connected to one end of an integrating capacitor and an input end of the on-chip analog-to-digital conversion circuit; the other end of the integrating capacitor is grounded; and the on-chip analog-to-digital conversion circuit includes a first inverter, a second inverter, a third inverter, an exclusive-OR gate, a built-in sequence counter, and a register.