Patents by Inventor Jitendra Kumar Gupta

Jitendra Kumar Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11907630
    Abstract: A method is provided for performing power validation on an integrated circuit (IC) design based on a power assertion specification. The method includes receiving the power assertion specification for the IC design, where the power assertion specification includes a predicted power consumption. Power consumption of the IC design is estimated according to power assertions specified in the power assertion specification. The estimated power consumption is compared against the predicted power consumption included in the power assertion specification. The IC design is determined to be associated with a power assertion failure based on results of the comparing. In response to determining that the IC design is associated with the power assertion failure, the IC design is refined to remedy the power assertion failure.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: February 20, 2024
    Assignee: Synopsys, Inc.
    Inventors: Jitendra Kumar Gupta, Alexander John Wakefield
  • Patent number: 11361140
    Abstract: Automated routing of signal nets for interposer designs. Signal nets are defined by their endpoints (bumps). The nets and their corresponding bumps are assigned to bump groups, based on the relative locations of the bumps and also based on length-matching constraints for the nets. Some of the bump groups may be “clones,” where the routing for one bump group may also be applied to its clone. In order for two bump groups to be clones, the bumps in the two bump groups must have a same relative position (i.e., same bump pattern), and the nets in the two bump groups must be subject to the same length-matching constraint. The routing through the interposer for one of the clones is determined, and that routing is then replicated for the other clones.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: June 14, 2022
    Assignee: Synopsys, Inc.
    Inventors: Jitendra Kumar Gupta, Ksenia Roze, Xun Liu, Paul Chang, Lan Luo
  • Patent number: 11334700
    Abstract: A simulation application can be executed by a computer system to develop thermal maps for an electronic architectural design. The simulation application can simulate the electronic architectural design over time. The simulation application can capture electronic signals from the electronic architectural design as the electronic architectural design is being simulated over time. The simulation application can determine power consumptions of the electronic architectural design over time from the electronic signals. The simulation application can derive temperatures of the electronic architectural design over time from the power consumptions. The simulation application can map the temperatures onto an electronic circuit design real estate of the electronic architectural design to develop the thermal maps over time.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: May 17, 2022
    Assignee: Synopsys, Inc.
    Inventors: Alexander John Wakefield, Jitendra Kumar Gupta
  • Patent number: 10867106
    Abstract: Automated routing of signal nets for interposer designs. Signal nets are defined by their endpoints (bumps). The nets and their corresponding bumps are assigned to bump groups, based on the relative locations of the bumps and also based on length-matching constraints for the nets. Some of the bump groups may be “clones,” where the routing for one bump group may also be applied to its clone. In order for two bump groups to be clones, the bumps in the two bump groups must have a same relative position (i.e., same bump pattern), and the nets in the two bump groups must be subject to the same length-matching constraint. The routing through the interposer for one of the clones is determined, and that routing is then replicated for the other clones.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: December 15, 2020
    Assignee: Synopsys, Inc.
    Inventors: Jitendra Kumar Gupta, Ksenia Roze, Xun Liu, Paul Chang, Lan Luo
  • Patent number: 10646804
    Abstract: A flow conditioning device for conditioning a wet gas stream having a plurality of liquid droplets and a gas flow is presented. The flow conditioning device includes a first segment including a first convergent section configured to break the plurality of liquid droplets from a first size to a second size. Further, the flow conditioning device includes a second segment coupled to the first segment and including a second convergent section configured to break the plurality of liquid droplets from the second size to a third size.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: May 12, 2020
    Assignee: NUOVO PIGNONE TECNOLOGIE SRL
    Inventors: Jitendra Kumar Gupta, Rene Du Cauze de Nazelle, Carlo Maria Martini, Massimiliano Cirri, II
  • Publication number: 20170319995
    Abstract: A flow conditioning device for conditioning a wet gas stream having a plurality of liquid droplets and a gas flow is presented. The flow conditioning device includes a first segment including a first convergent section configured to break the plurality of liquid droplets from a first size to a second size. Further, the flow conditioning device includes a second segment coupled to the first segment and including a second convergent section configured to break the plurality of liquid droplets from the second size to a third size.
    Type: Application
    Filed: November 24, 2015
    Publication date: November 9, 2017
    Inventors: Jitendra Kumar GUPTA, Rene DU CAUZE DE NAZELLE, Carlo Maria MARTINI, Massimiliano CIRRI, II
  • Patent number: 8577626
    Abstract: Methods and systems for assessing fluid dynamics aspects of corrosion and shear stress in piping networks are provided. Shear stress hot spots of a piping network may be identified using non-dimensional transfer functions that have been developed for identifying the magnitude and location of these local maxima depending upon the geometrical parameters of commonly used components of piping networks, the fluid properties of the flow, and the operating conditions of the piping network. Upon identification of potential shear stress local maxima, piping network operators may monitor these locations for corrosion or other damage to prevent loss of integrity of the pipes.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: November 5, 2013
    Assignee: General Electric Company
    Inventors: Jitendra Kumar Gupta, Muralidharan Lakshmipathy, Yatin Tayalia
  • Publication number: 20100023276
    Abstract: Methods and systems for assessing fluid dynamics aspects of corrosion and shear stress in piping networks are provided. Shear stress hot spots of a piping network may be identified using non-dimensional transfer functions that have been developed for identifying the magnitude and location of these local maxima depending upon the geometrical parameters of commonly used components of piping networks, the fluid properties of the flow, and the operating conditions of the piping network. Upon identification of potential shear stress local maxima, piping network operators may monitor these locations for corrosion or other damage to prevent loss of integrity of the pipes.
    Type: Application
    Filed: July 22, 2008
    Publication date: January 28, 2010
    Applicant: General Electric Company
    Inventors: Jitendra Kumar Gupta, Muralidharan L., Yatin Tayalia