Patents by Inventor JIUN-SHI LIU
JIUN-SHI LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12002767Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially encapsulating the integrated circuit die; a conductive via extending through the encapsulant; a redistribution structure on the encapsulant, the redistribution structure including: a metallization pattern electrically coupled to the conductive via and the integrated circuit die; a dielectric layer on the metallization pattern, the dielectric layer having a first thickness of 10 ?m to 30 ?m; and a first under-bump metallurgy (UBM) having a first via portion extending through the dielectric layer and a first bump portion on the dielectric layer, the first UBM being physically and electrically coupled to the metallization pattern, the first via portion having a first width, a ratio of the first thickness to the first width being from 1.33 to 1.66.Type: GrantFiled: January 3, 2022Date of Patent: June 4, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chung-Shi Liu, Jiun Yi Wu, Chien-Hsun Lee
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Patent number: 11984374Abstract: A method includes placing a package component over a carrier. The package component includes a device die. A core frame is placed over the carrier. The core frame forms a ring encircling the package component. The method further includes encapsulating the core frame and the package component in an encapsulant, forming redistribution lines over the core frame and the package component, and forming electrical connectors over and electrically coupling to the package component through the redistribution lines.Type: GrantFiled: February 14, 2022Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jiun Yi Wu, Chen-Hua Yu, Chung-Shi Liu
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Patent number: 11984375Abstract: In an embodiment, a device includes: a first integrated circuit die having a first contact region and a first non-contact region; an encapsulant contacting sides of the first integrated circuit die; a dielectric layer contacting the encapsulant and the first integrated circuit die, the dielectric layer having a first portion over the first contact region, a second portion over the first non-contact region, and a third portion over a portion of the encapsulant; and a metallization pattern including: a first conductive via extending through the first portion of the dielectric layer to contact the first integrated circuit die; and a conductive line extending along the second portion and third portion of the dielectric layer, the conductive line having a straight portion along the second portion of the dielectric layer and a first meandering portion along the third portion of the dielectric layer.Type: GrantFiled: April 18, 2023Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chien-Hsun Chen, Yu-Ling Tsai, Jiun Yi Wu, Chien-Hsun Lee, Chung-Shi Liu
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Patent number: 11961814Abstract: In an embodiment, a device includes: a semiconductor device; and a redistribution structure including: a first dielectric layer; a first grounding feature on the first dielectric layer; a second grounding feature on the first dielectric layer; a first pair of transmission lines on the first dielectric layer, the first pair of transmission lines being laterally disposed between the first grounding feature and the second grounding feature, the first pair of transmission lines being electrically coupled to the semiconductor device; a second dielectric layer on the first grounding feature, the second grounding feature, and the first pair of transmission lines; and a third grounding feature extending laterally along and through the second dielectric layer, the third grounding feature being physically and electrically coupled to the first grounding feature and the second grounding feature, where the first pair of transmission lines extend continuously along a length of the third grounding feature.Type: GrantFiled: January 31, 2022Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hsun Chen, Shou-Yi Wang, Jiun Yi Wu, Chung-Shi Liu, Chen-Hua Yu
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Patent number: 11955442Abstract: In an embodiment, a structure includes a core substrate, a redistribution structure coupled, the redistribution structure including a plurality of redistribution layers, the plurality of redistribution layers comprising a dielectric layer and a metallization layer, a first local interconnect component embedded in a first redistribution layer of the plurality of redistribution layers, the first local interconnect component comprising conductive connectors, the conductive connectors being bonded to a metallization pattern of the first redistribution layer, the dielectric layer of the first redistribution layer encapsulating the first local interconnect component, a first integrated circuit die coupled to the redistribution structure, a second integrated circuit die coupled to the redistribution structure, an interconnect structure of the first local interconnect component electrically coupling the first integrated circuit die to the second integrated circuit die, and a set of conductive connectors coupled to aType: GrantFiled: February 27, 2023Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jiun Yi Wu, Chen-Hua Yu, Chung-Shi Liu
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Publication number: 20240096812Abstract: A method of forming a semiconductor device includes arranging a semi-finished substrate, which has been tested and is known to be good, on a carrier substrate. Encapsulating the semi-finished substrate in a first encapsulant and arranging at least one semiconductor die over the semi-finished substrate. Electrically coupling at least one semiconductor component of the at least one semiconductor die to the semi-finished substrate and encasing the at least one semiconductor die and portions of the first encapsulant in a second encapsulant. Removing the carrier substrate from the semi-finished substrate and bonding a plurality of external contacts to the semi-finished substrate.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Jiun Yi Wu, Chen-Hua Yu, Chung-Shi Liu, Chien-Hsun Lee
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Patent number: 8872672Abstract: A traffic signal system with dual light sources includes a signal displaying module, an ambient light module and a supplementary light module. The ambient light from environment is assembled by the ambient light module for generating a first light beam. A second light beam is provided by the supplementary light module disposed near the ground for easy maintaining and avoiding danger. The supplementary light module includes a sensor and a control circuit. The sensor senses the brightness of the first light beam passing through the signal displaying module and generates a photosensitive signal. The brightness of the second light beam is regulated by the control circuit according to the photosensitive signal. The brightness of the first light beam is supplied by regulating the brightness of the second light beam, so the signal displaying module has high-brightness light source and achieves the energy conservation.Type: GrantFiled: June 6, 2012Date of Patent: October 28, 2014Assignee: National Taiwan University of Science and TechnologyInventors: Allen Jong-Woei Whang, Yi-Yung Chen, Horng-Ching Hsiao, Jiun-Shi Liu, Nai-Lun Ku
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Publication number: 20130027223Abstract: A traffic signal system with dual light sources includes a signal displaying module, an ambient light module and a supplementary light module. The ambient light from environment is assembled by the ambient light module for generating a first light beam. A second light beam is provided by the supplementary light module disposed near the ground for easy maintaining and avoiding danger. The supplementary light module includes a sensor and a control circuit. The sensor senses the brightness of the first light beam passing through the signal displaying module and generates a photosensitive signal. The brightness of the second light beam is regulated by the control circuit according to the photosensitive signal. The brightness of the first light beam is supplied by regulating the brightness of the second light beam, so the signal displaying module has high-brightness light source and achieves the energy conservation.Type: ApplicationFiled: June 6, 2012Publication date: January 31, 2013Applicant: National Taiwan University of Science and TechnologyInventors: ALLEN JONG-WOEI WHANG, YI-YUNG CHEN, HORNG-CHING HSIAO, JIUN-SHI LIU, NAI-LUN KU