Patents by Inventor Jiun Yang

Jiun Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230282625
    Abstract: A semiconductor package includes a bottom substrate and a top substrate space apart from the bottom substrate such that the bottom substrate and the top substrate define a gap therebetween. A logic die is mounted on a top surface of the bottom substrate. The logic die has a thickness of 125-350 micrometers. A plurality of copper cored solder balls is disposed between the bottom substrate and the top substrate around the logic die to electrically connect the bottom substrate with the top substrate. A sealing resin fills into the gap between the bottom substrate and the top substrate and sealing the logic die and the plurality of copper cored solder balls in the gap.
    Type: Application
    Filed: February 9, 2023
    Publication date: September 7, 2023
    Applicant: MEDIATEK INC.
    Inventors: Ta-Jen Yu, Shih-Chin Lin, Tai-Yu Chen, Bo-Jiun Yang, Bing-Yeh Lin, Yung-Cheng Huang, Wen-Sung Hsu, Bo-Hao Ma, Isabella Song
  • Publication number: 20230282626
    Abstract: A high-bandwidth package-on-package (HBPoP) structure includes a first package structure and a second package structure disposed over the first package structure. The first package structure includes a first package substrate, a semiconductor die, an interposer, and a molding material. The first package substrate is formed of a silicon and/or ceramic material. The semiconductor die is disposed over the first package substrate. The interposer is disposed over the semiconductor die and is formed of a silicon and/or ceramic material. The molding material is disposed between the first package substrate and the interposer and surrounds the semiconductor die.
    Type: Application
    Filed: February 2, 2023
    Publication date: September 7, 2023
    Inventors: Tai-Yu CHEN, Bo-Jiun YANG, Tsung-Yu PAN, Yin-Fa CHEN, Ta-Jen YU, Bo-Hao MA, Wen-Sung HSU, Yao-Pang HSU
  • Publication number: 20230260866
    Abstract: A semiconductor package structure includes a package substrate, a semiconductor die, an interposer, an adhesive layer, and a molding material. The semiconductor die is disposed over the package substrate. The interposer is disposed over the semiconductor die. The adhesive layer connects the semiconductor die and the interposer. The molding material surrounds the semiconductor die and the adhesive layer.
    Type: Application
    Filed: January 20, 2023
    Publication date: August 17, 2023
    Inventors: Yin-Fa CHEN, Bo-Jiun YANG, Ta-Jen YU, Bo-Hao MA, Chih-Wei CHANG, Tsung-Yu PAN, Tai-Yu CHEN, Shih-Chin LIN, Wen-Sung HSU
  • Publication number: 20230238302
    Abstract: A semiconductor package includes a substrate; a die mounted on a top surface of the substrate in a flip-chip fashion; and a lid mounted on the die and on a perimeter of the substrate. The lid includes a cover plate and four walls formed integral with the cover plate. A liquid-cooling channel is situated between the cover plate of the lid and a rear surface of the die for circulating a coolant relative to the semiconductor package.
    Type: Application
    Filed: March 30, 2023
    Publication date: July 27, 2023
    Applicant: MEDIATEK INC.
    Inventors: Chia-Hao Hsu, Tai-Yu Chen, Sheng-Liang Kuo, Bo-Jiun Yang
  • Publication number: 20230197667
    Abstract: A semiconductor device includes a substrate, an electronic component, a cover, a heat conduction component and a dam. The electronic component is disposed on the substrate. The cover is disposed on the substrate and covers the electronic component. The heat conduction component is disposed between the electronic component and the cover. The dam is disposed between the electronic component and the cover and surrounds the heat conduction component.
    Type: Application
    Filed: February 22, 2023
    Publication date: June 22, 2023
    Inventors: Yu-Jin LI, Bo-Jiun YANG, Tai-Yu CHEN, Tsung-Yu PAN, Chun-Yin LIN
  • Publication number: 20230185280
    Abstract: An integrated circuit (IC) configurable to perform adaptive thermal ceiling control in a per-functional-block manner, an associated main circuit, an associated electronic device and an associated thermal control method are provided. The IC may include a plurality of hardware circuits arranged to perform operations of a first functional block, and at least one thermal control circuit. At least one temperature sensor is coupled with the first functional block to detect temperature and to generate at least one temperature sensing result of the first functional block.
    Type: Application
    Filed: November 23, 2022
    Publication date: June 15, 2023
    Applicant: MEDIATEK INC.
    Inventors: Chih-Fu Tsai, Yu-Chia Chang, Bo-Jiun Yang, Yen-Hwei Hsieh, Shun-Yao Yang, Jia-Wei Fang, Ta-Chang Liao, Tai-Yu Chen
  • Patent number: 11640930
    Abstract: A semiconductor package includes a substrate; a die mounted on a top surface of the substrate in a flip-chip fashion; and a lid mounted on the die and on a perimeter of the substrate. The lid includes a cover plate and four walls formed integral with the cover plate. A liquid-cooling channel is situated between the cover plate of the lid and a rear surface of the die for circulating a coolant relative to the semiconductor package.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: May 2, 2023
    Assignee: MEDIATEK INC.
    Inventors: Chia-Hao Hsu, Tai-Yu Chen, Sheng-Liang Kuo, Bo-Jiun Yang
  • Publication number: 20230046413
    Abstract: A semiconductor assembly package is provided. The semiconductor package assembly includes a system-on-chip (SOC) package, a memory package and a heat spreader. The SOC package includes a logic die and a first substrate. The logic die has pads on it. The first substrate is electrically connected to the logic die by the pads. The memory package includes a second substrate and a memory die. The second substrate has a top surface and a bottom surface. The memory die is mounted on the top surface of the second substrate and is electrically connected to the second substrate using bonding wires. The heat spreader is disposed between the SOC package and the memory package, wherein the heat spreader is in contact with a back surface of the logic die away from the pads.
    Type: Application
    Filed: July 15, 2022
    Publication date: February 16, 2023
    Inventors: Tai-Yu CHEN, Chin-Lai CHEN, Hsiao-Yun CHEN, Wen-Sung HSU, Haw-Kuen SU, Duen-Yi HO, Bo-Jiun YANG, Ta-Jen YU, Bo-Hao MA
  • Patent number: 11569873
    Abstract: A MIMO symbol detection and search method, a decoding circuit and a receiving antenna system are provided. The signal detection and search method includes the following steps. A symbol search tree is obtained, and a plurality of candidate symbols at each layer of the symbol search tree are sorted. The candidate symbols are traversed in sequence at each layer of the symbol search tree. At each layer of the symbol search tree, if a cumulative partial Euclidean distance is greater than or equal to a threshold, un-scanned candidate symbols are excluded. If the cumulative partial Euclidean distance is less than the threshold, the threshold is updated by the cumulative partial Euclidean distance. When all of the candidate symbols have been calculated, an estimated symbol combination is outputted, and the scan of the symbol search tree is terminated.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: January 31, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kai-Jiun Yang, Chi-Tien Sun, Shang-Ho Tsai
  • Publication number: 20220392071
    Abstract: An image processing apparatus and an image-based test strip identification method are provided. In the method, multiple representative values on a first axis of a test strip image are determined. The test strip image is obtained by capturing a test strip. A second axis parallel to a test line or a control line of the test strip is perpendicular to the first axis. A test result of the test strip is determined according to a difference between a first representative value and a second representative value of the representative values. The test result includes a positive result and a negative result.
    Type: Application
    Filed: August 10, 2021
    Publication date: December 8, 2022
    Applicant: Wistron Corporation
    Inventors: Zhao-Yuan Lin, Jia-Jiun Yang
  • Publication number: 20220328378
    Abstract: A semiconductor device includes a substrate, an electronic component, a cover and a liquid metal. The electronic component is disposed on the substrate. The cover is disposed on the substrate and covers the electronic component. The liquid metal is formed between the cover and the electronic component.
    Type: Application
    Filed: March 22, 2022
    Publication date: October 13, 2022
    Inventors: Bo-Jiun YANG, Wen-Sung HSU, Tai-Yu CHEN, Sheng-Liang KUO, Chia-Hao HSU
  • Publication number: 20220207342
    Abstract: A data compression method, a data compression system and an operation method of a deep learning acceleration chip are provided. The data compression method includes the following steps. A filter coefficient tensor matrix of a deep learning model is obtained. A matrix decomposition procedure is performed according to the filter coefficient tensor matrix to obtain a sparse tensor matrix and a transformation matrix, which is an orthonormal matrix. The product of the transformation matrix and the filter coefficient tensor matrix is the sparse tensor matrix. The sparse tensor matrix is compressed. The sparse tensor matrix and the transformation matrix, or the sparse tensor matrix and a restoration matrix, are stored in a memory. A convolution operation result is obtained by the deep learning acceleration chip using the sparse tensor matrix. The convolution operation result is restored by the deep learning acceleration chip using the restoration matrix.
    Type: Application
    Filed: December 30, 2020
    Publication date: June 30, 2022
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kai-Jiun YANG, Gwo-Giun LEE, Chi-Tien SUN
  • Publication number: 20220199593
    Abstract: A semiconductor device includes a bottom package, a top package stacked on the bottom package, and an interposer disposed between the bottom package and the top package. The top package is electrically connected to the interposer through a plurality of peripheral solder balls. At least a dummy thermal feature is disposed on the interposer and surrounded by the plurality of peripheral solder balls.
    Type: Application
    Filed: October 4, 2021
    Publication date: June 23, 2022
    Applicant: MEDIATEK INC.
    Inventors: Bo-Jiun Yang, Wen-Sung Hsu, Tai-Yu Chen, Shih-Chin Lin, Kun-Ting Hung
  • Publication number: 20210074608
    Abstract: A semiconductor package includes a substrate; a die mounted on a top surface of the substrate in a flip-chip fashion; and a lid mounted on the die and on a perimeter of the substrate. The lid includes a cover plate and four walls formed integral with the cover plate. A liquid-cooling channel is situated between the cover plate of the lid and a rear surface of the die for circulating a coolant relative to the semiconductor package.
    Type: Application
    Filed: August 11, 2020
    Publication date: March 11, 2021
    Inventors: Chia-Hao Hsu, Tai-Yu Chen, Sheng-Liang Kuo, Bo-Jiun Yang
  • Patent number: 9674335
    Abstract: A multi-configuration input device is described. In one or more examples, an input device comprises a connection portion configured to be secured to a mobile computing device using a magnetic connection, an input portion having one or more sensors configured to generate inputs responsive to user interaction, a support portion rotationally secured to the input portion and the connection portion and effective to assume a cover configuration in which the support portion and the input portion are positioned to cover a display device of the mobile computing device, and further effective to assume a stand configuration in which the support portion and the input portion are position at an acute angle with respect to one another, and an operating system selection key operable to select from a plurality of operating systems.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: June 6, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Able Chen, Wei Zheng, Sheau Jiun Yang, Po-Lin Ho
  • Publication number: 20170063708
    Abstract: A method, a computer program product, and a computer system for exchanging cloud resources between tenants. A mediator system receives from a user a request for a cloud resource, aggregates the cloud resource from one or more of the tenants, and replies the request for a cloud resource with a description of the cloud resource. The mediator system receives from the user a request for resource delegation, initiates a transaction of the cloud resource, retrieves the cloud resource from a resource pool, and determines whether the cloud resource complies with an access control list (ACL) policy. The mediator system enforces a resource acquisition, in response to determining that the cloud resource complies with the ACL policy. The mediator system the request for resource delegation with a resource delegation result.
    Type: Application
    Filed: September 1, 2015
    Publication date: March 2, 2017
    Inventors: Jiun-Yang Hsu, Cheng-Ta Lee, Dah Haur D. Lin
  • Patent number: D779488
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: February 21, 2017
    Assignee: Microsoft Corporation
    Inventors: Vicky Chen, Jiun Yang, Michael Zheng
  • Patent number: D790544
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: June 27, 2017
    Assignee: Microsoft Corporation
    Inventors: Vicky Chen, Jiun Yang, Michael Zheng
  • Patent number: D803835
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: November 28, 2017
    Assignee: Microsoft Corporation
    Inventors: Michael Zheng, Greg Jones, Jan Raken, Kate Bailey, Sheau Jiun Yang
  • Patent number: D803836
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: November 28, 2017
    Assignee: Microsoft Corporation
    Inventors: Michael Zheng, Greg Jones, Jan Raken, Kate Bailey, Sheau Jiun Yang