Patents by Inventor Jivko Dinev
Jivko Dinev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9236305Abstract: Laser and plasma etch wafer dicing where a mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a film frame by an adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The laser scribing exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask while the film frame is maintained at an acceptably low temperature with a chamber shield ring configured to sit beyond the wafer edge and cover the frame. The shield ring may be raised and lowered, for example, on lifter pins to facilitate transfer of the wafer on frame.Type: GrantFiled: January 17, 2014Date of Patent: January 12, 2016Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Saravjeet Singh, Jivko Dinev, Aparna Iyer, Brad Eaton, Ajay Kumar
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Patent number: 9023227Abstract: Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C).Type: GrantFiled: May 25, 2012Date of Patent: May 5, 2015Assignee: Applied Materials, Inc.Inventors: Jivko Dinev, Saravjeet Singh, Khalid M. Sirajuddin, Tong Liu, Puneet Bajaj, Rohit Mishra, Sonal A. Srivastava, Madhava Rao Yalamanchili, Ajay Kumar
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Patent number: 8920599Abstract: Embodiments of the present invention relate to a plasma chamber having a coil assembly which improves plasma uniformity and improves power coupling to the plasma. One embodiment provides a plasma chamber. The plasma chamber includes a chamber body having sidewalls and a lid, wherein the chamber body defines a processing volume. The plasma chamber further includes a coil assembly disposed over the lid configured to generate inductively coupled plasma within the processing volume, wherein the coil assembly comprises two or more horizontal coils arranged in a common horizontal plane.Type: GrantFiled: October 11, 2011Date of Patent: December 30, 2014Assignee: Applied Materials, Inc.Inventors: Jivko Dinev, Saravjeet Singh, Roy C. Nangoy
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Publication number: 20140213041Abstract: Laser and plasma etch wafer dicing where a mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a film frame by an adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The laser scribing exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask while the film frame is maintained at an acceptably low temperature with a chamber shield ring configured to sit beyond the wafer edge and cover the frame. The shield ring may be raised and lowered, for example, on lifter pins to facilitate transfer of the wafer on frame.Type: ApplicationFiled: January 17, 2014Publication date: July 31, 2014Inventors: Wei-Sheng LEI, Saravjeet SINGH, Jivko DINEV, Aparna IYER, Brad EATON, Ajay KUMAR
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Publication number: 20140179108Abstract: Embodiments of the invention generally relate to an apparatus and method for plasma etching. In one embodiment, the apparatus includes a process ring with an annular step away from an inner wall of the ring and is disposed on a substrate support in a plasma process chamber. A gap is formed between the process ring and a substrate placed on the substrate support. The annular step has an inside surface having a height ranging from about 3 mm to about 6 mm. During operation, an edge-exclusion gas is introduced to flow through the gap and along the inside surface, so the plasma is blocked from entering the space near the edge of the substrate.Type: ApplicationFiled: March 4, 2013Publication date: June 26, 2014Inventors: Dung Huu Le, Graeme Jamieson Scott, Jivko Dinev, Madhava Rao Yalamanchili, Khalid Mohiuddin Sirajuddin, Puneet Bajaj, Saravjeet Singh
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Patent number: 8596336Abstract: Apparatus for controlling the temperature of a substrate support may include a first heat transfer loop and a second heat transfer loop. The first heat transfer loop may have a first bath with a first heat transfer fluid at a first temperature. The second heat transfer loop may have a second bath with a second heat transfer fluid at a second temperature. The first and second temperatures may be the same or different. First and second flow controllers may be provided for respectively providing the first and second heat transfer fluids to a substrate support. One or more return lines may couple one or more outlets of the substrate support to the first and second baths for returning the first and second heat transfer fluids to the first and second baths.Type: GrantFiled: June 3, 2008Date of Patent: December 3, 2013Assignee: Applied Materials, Inc.Inventors: Richard Fovell, Paul Brillhart, Sang In Yi, Anisul H. Khan, Jivko Dinev, Shane Nevil
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Patent number: 8475625Abstract: Embodiments of the invention provide a method and apparatus, such as a processing chamber, suitable for etching high aspect ratio features. Other embodiments include a showerhead assembly for use in the processing chamber. In one embodiment, a processing chamber includes a chamber body having a showerhead assembly and substrate support disposed therein. The showerhead assembly includes at least two fluidly isolated plenums, a region transmissive to an optical metrology signal, and a plurality of gas passages formed through the showerhead assembly fluidly coupling the plenums to the interior volume of the chamber body.Type: GrantFiled: May 3, 2006Date of Patent: July 2, 2013Assignee: Applied Materials, Inc.Inventors: Sharma Pamarthy, Huutri Dao, Xiaoping Zhou, Kelly A. McDonough, Jivko Dinev, Farid Abooameri, David E. Gutierrez, Jim Zhongyi He, Robert S. Clark, Dennis M. Koosau, Jeffrey William Dietz, Declan Scanlan, Subhash Deshmukh, John P. Holland, Alexander Paterson
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Publication number: 20130005152Abstract: Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C).Type: ApplicationFiled: May 25, 2012Publication date: January 3, 2013Applicant: Applied Materials, Inc.Inventors: JIVKO DINEV, Saravjeet Singh, Khalid M. Sirajuddin, Tong Liu, Puneet Bajaj, Rohit Mishra, Sonal A. Srivastava, Madhava Rao Yalamanchili, Ajay Kumar
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Publication number: 20120091098Abstract: Embodiments of the present invention relate to a plasma chamber having a coil assembly which improves plasma uniformity and improves power coupling to the plasma. One embodiment provides a plasma chamber. The plasma chamber includes a chamber body having sidewalls and a lid, wherein the chamber body defines a processing volume. The plasma chamber further includes a coil assembly disposed over the lid configured to generate inductively coupled plasma within the processing volume, wherein the coil assembly comprises two or more horizontal coils arranged in a common horizontal plane.Type: ApplicationFiled: October 11, 2011Publication date: April 19, 2012Applicant: APPLIED MATERIALS, INC.Inventors: Jivko Dinev, Saravjeet Singh, Roy C. Nangoy
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Publication number: 20100099266Abstract: Embodiments of the invention provide a method and apparatus that enables plasma etching of high aspect ratio features. In one embodiment, a method for etching is provided that includes providing a substrate having a patterned mask disposed on a silicon layer in an etch reactor, providing a gas mixture of the reactor, maintaining a plasma formed from the gas mixture, wherein bias power and RF power provided the reactor are pulsed, and etching the silicon layer in the presence of the plasma.Type: ApplicationFiled: September 21, 2009Publication date: April 22, 2010Applicant: APPLIED MATERIALS, INC.Inventors: Manfred Oswald, Jivko Dinev, Jan Rupf, Markus Meye, Francesco Maletta, Uwe Leucke, Ron Tilger, Farid Abooameri, Alexander Matyushkin, Denis Koosau, Xiaoping Zhou, Thorsten Lehmann, Declan Scanlan
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Publication number: 20090294101Abstract: Methods and apparatus for controlling the temperature of a substrate support are provided herein. In some embodiments, an apparatus for controlling the temperature of a substrate support may include a first heat transfer loop and a second heat transfer loop. The first heat transfer loop may have a first bath with a first heat transfer fluid at a first temperature. The second heat transfer loop may have a second bath with a second heat transfer fluid at a second temperature. The first and second temperatures may be the same or different. First and second flow controllers may be provided for respectively providing the first and second heat transfer fluids to a substrate support. One or more return lines may couple one or more outlets of the substrate support to the first and second baths for returning the first and second heat transfer fluids to the first and second baths.Type: ApplicationFiled: June 3, 2008Publication date: December 3, 2009Applicant: APPLIED MATERIALS, INC.Inventors: RICHARD FOVELL, Paul Brillhart, Sang In Yi, Anisul H. Khan, Jivko Dinev, Shane Nevil
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Patent number: 7554334Abstract: Embodiments of a method of calculating the equivalent series resistance of a matching network using variable impedance analysis and matching networks analyzed using the same are provided herein. In one embodiment, a method of calculating the equivalent series resistance of a matching network includes the steps of connecting the matching network to a load; measuring an output of the matching network over a range of load impedances; and calculating the equivalent series resistance of the matching network based upon a relationship between the measured output and the load resistance. The load may be a surrogate load or may be a plasma formed in a process chamber.Type: GrantFiled: September 28, 2006Date of Patent: June 30, 2009Assignee: Applied Marterials, Inc.Inventors: Steven C. Shannon, Daniel J. Hoffman, Steven Lane, Walter R. Merry, Jivko Dinev
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Publication number: 20080087381Abstract: Embodiments of a method of calculating the equivalent series resistance of a matching network using variable impedance analysis and matching networks analyzed using the same are provided herein. In one embodiment, a method of calculating the equivalent series resistance of a matching network includes the steps of connecting the matching network to a load; measuring an output of the matching network over a range of load impedances; and calculating the equivalent series resistance of the matching network based upon a relationship between the measured output and the load resistance. The load may be a surrogate load or may be a plasma formed in a process chamber.Type: ApplicationFiled: September 28, 2006Publication date: April 17, 2008Applicant: Applied Materials, Inc.Inventors: STEVEN C. SHANNON, Daniel J. Hoffman, Steven Lane, Walter R. Merry, Jivko Dinev
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Publication number: 20070256785Abstract: Embodiments of the invention provide a method and apparatus, such as a processing chamber, suitable for etching high aspect ratio features. Other embodiments include a showerhead assembly for use in the processing chamber. In one embodiment, a processing chamber includes a chamber body having a showerhead assembly and substrate support disposed therein. The showerhead assembly includes at least two fluidly isolated plenums, a region transmissive to an optical metrology signal, and a plurality of gas passages formed through the showerhead assembly fluidly coupling the plenums to the interior volume of the chamber body.Type: ApplicationFiled: May 3, 2006Publication date: November 8, 2007Inventors: Sharma Pamarthy, Huutri Dao, Xiaoping Zhou, Kelly McDonough, Jivko Dinev, Farid Abooameri, David Gutierrez, Jim He, Robert Clark, Dennis Koosau, Jeffrey Dietz, Declan Scanlan, Subhash Deshmukh, John Holland, Alexander Paterson