Abstract: A semiconductor element includes an enhancement-type transistor structure with a layer construction including a base substrate, a first semiconductor layer, and a second semiconductor layer, which are arranged one on top of the other along a first direction. The transistor structure further has a source electrode, a gate electrode, and a drain electrode, which are spaced apart from one another along a second direction that is transverse to the first direction. The first and second semiconductor layers are formed by different group III nitride materials, such that a 2D electron gas forms in a boundary region of the first and second semiconductor layers. The first and second semiconductor layers have holes in the region of the gate electrode, between which holes multiple fins including the group III nitride materials remain. The gate electrode has a plurality of gate fingers extending into the holes.

Abstract: A semiconductor element includes an enhancement-type transistor structure with a layer construction including a base substrate, a first semiconductor layer, and a second semiconductor layer, which are arranged one on top of the other along a first direction. The transistor structure further has a source electrode, a gate electrode, and a drain electrode, which are spaced apart from one another along a second direction that is transverse to the first direction. The first and second semiconductor layers are formed by different group III nitride materials, such that a 2D electron gas forms in a boundary region of the first and second semiconductor layers. The first and second semiconductor layers have holes in the region of the gate electrode, between which holes multiple fins including the group III nitride materials remain. The gate electrode has a plurality of gate fingers extending into the holes.

Abstract: A semiconductor substrate having a first lateral dimension is combined with a flexible film piece having a second lateral dimension by arranging the semiconductor substrate in a recess of the film piece. The semiconductor substrate has circuit structures produced using lithography process steps. After the semiconductor substrate has been arranged in the recess of the film piece, a patterned layer of an electrically conductive material is produced above the semiconductor substrate and the film piece using lithography process steps. The patterned layer extends from the semiconductor substrate up to the flexible film piece and forms a number of electrically conductive contact tracks between the semiconductor substrate and the film piece.

Abstract: In a method for producing a very thin chip including an integrated circuit, a circuit structure is produced in a defined section of a semiconductor wafer. The defined wafer section is subsequently released from the semiconductor wafer. For this purpose, the wafer section is firstly freed such that it is held only via local web-like connections on the remaining semiconductor wafer, which web-like connections are arranged at a lateral periphery of the wafer section. The web-like connections are subsequently severed.

Abstract: A circuit arrangement for generating light-dependent and temperature-dependent signals has a number of first and second sensor elements, which generate a number of first and second electrical signals. The first and second electrical signals depend on electromagnetic radiation impinging on the circuit arrangement. The first sensor elements are designed to generate the first electrical signals in a manner dependent on electromagnetic radiation from a first wavelength range which comprises a substantial part of the visible light. The second sensor elements are designed to generate the second electrical signals in a manner dependent on electromagnetic radiation from a second wavelength range which predominantly comprises infrared radiation. The first wavelength range overlaps the second wavelength range and it therefore also comprises infrared radiation.

Abstract: A semiconductor substrate having a first lateral dimension is combined with a flexible film piece having a second lateral dimension by arranging the semiconductor substrate in a recess of the film piece. The semiconductor substrate has circuit structures produced using lithography process steps. After the semiconductor substrate has been arranged in the recess of the film piece, a patterned layer of an electrically conductive material is produced above the semiconductor substrate and the film piece using lithography process steps. The patterned layer extends from the semiconductor substrate up to the flexible film piece and forms a number of electrically conductive contact tracks between the semiconductor substrate and the film piece.

Abstract: In a method for producing a thin film chip including an integrated circuit, a semi-conductor wafer having a first surface is provided. At least one cavity is produced under a defined section of the first surface by means of porous silicon. A circuit structure is produced in the defined section. The defined wafer section is subsequently released from the semiconductor wafer by severing local web-like connections, which hold the wafer section above the cavity and on the remaining semiconductor wafer.

Abstract: A circuit arrangement for generating light-dependent and temperature-dependent signals has a number of first and second sensor elements, which generate a number of first and second electrical signals. The first and second electrical signals depend on electromagnetic radiation impinging on the circuit arrangement. The first sensor elements are designed to generate the first electrical signals in a manner dependent on electromagnetic radiation from a first wavelength range which comprises a substantial part of the visible light. The second sensor elements are designed to generate the second electrical signals in a manner dependent on electromagnetic radiation from a second wavelength range which predominantly comprises infrared radiation. The first wavelength range overlaps the second wavelength range and it therefore also comprises infrared radiation.

Abstract: In a method for producing a very thin chip including an integrated circuit, a circuit structure is produced in a defined section of a semiconductor wafer. The defined wafer section is subsequently released from the semiconductor wafer. For this purpose, the wafer section is firstly freed such that it is held only via local web-like connections on the remaining semiconductor wafer, which web-like connections are arranged at a lateral periphery of the wafer section. The web-like connections are subsequently severed.

Abstract: In a method for producing a thin film chip including an integrated circuit, a semi-conductor wafer having a first surface is provided. At least one cavity is produced under a defined section of the first surface by means of porous silicon. A circuit structure is produced in the defined section. The defined wafer section is subsequently released from the semiconductor wafer by severing local web-like connections, which hold the wafer section above the cavity and on the remaining semiconductor wafer.

Abstract: A SiGe-HBT structure for device integration on thin-SOI substrates is disclosed. The emitter and base regions are vertical while the collector contact is lateral in the otherwise MOS-like device structure. This allows one to integrate a SiGe base, the device capacitances are reduced, and the transistor can be combined with fully-depleted CMOS in a SOI-BiCMOS technology.

Abstract: A dual gate thin film or SOI MOSFET device having a sufficiently thin body thickness with one or more semiconductor channel layer(s) sandwiched by semiconductor layers having a different energy band structure to automatically confine carriers to the channel layer(s) without the need for channel grading or modulation doping. Preferred embodiments employ strained layer epitaxy having Si/SiGe/Si or SiGe/Si/SiGe semiconductor layers.

Abstract: Selective and non-selective epitaxial growth is utilized to form a bipolar transistor having self-aligned emitter and base regions. A substrate of semiconductor material of a first conductivity type is provided and a first layer of semiconductor material of a second conductivity type is non-selectively epitaxially grown on the substrate. An insulating element is formed on a portion of the first layer of semiconductor material and a second layer of semiconductor material of the second conductivity type is selectively epitaxially grown on the first layer such that a portion of the second layer laterally overgrows onto an upper surface of the insulating element. The lateral overgrowth forms an aperture in the second layer to expose a region of the upper surface of insulating element. A layer of insulating material is formed on the second layer to isolate the second layer of semiconductor material from a subsequent deposition of conductive material.