Abstract: A method of performing compression of image data for at least one image is described. The method comprises receiving image data of at least a part of the at least one image, encoding the received image data into at least one compressed data block, applying at least one bandwidth limit to the at least one compressed data block, and outputting the at least one bandwidth limited compressed data block to a buffer. The method further comprises dynamically updating the at least one bandwidth limit applied to the at least one compressed data block base at least partly on a fill level of the buffer.

Abstract: A task control circuit maintains, in response to task event information, a task information queue that includes task information for a plurality of tasks. Based upon the task information in the task information queue, a future task switch condition is identified as corresponding to a task switch time for a particular task of the plurality of tasks. A load start time is determined for a set of instructions for the particular task. A pre-fetch request is generated to load the set of instructions for the particular task into the memory circuit. The pre-fetch request is forwarded to a hardware loader circuit. In response to the task switch time, a task event trigger is generated for the particular task. The hardware loader circuit is used to load, in response to the pre-fetch request, the set of instructions from a non-volatile memory into the memory circuit.

Abstract: A task control circuit maintains, in response to task event information, a task information queue that includes task information for a plurality of tasks. Based upon the task information in the task information queue, a future task switch condition is identified as corresponding to a task switch time for a particular task of the plurality of tasks. A load start time is determined for a set of instructions for the particular task. A pre-fetch request is generated to load the set of instructions for the particular task into the memory circuit. The pre-fetch request is forwarded to a hardware loader circuit. In response to the task switch time, a task event trigger is generated for the particular task. The hardware loader circuit is used to load, in response to the pre-fetch request, the set of instructions from a non-volatile memory into the memory circuit.

Abstract: An imager simulator configured to be used in lieu of an imager within a vehicle is provided. The imager simulator includes an image source configured to store pre-determined reference data; and an imager interface unit configured to generate image data based on the pre-determined reference data. The image data conforms to a pre-determined format; and wherein the pre-determined format corresponds to a format of image data generated by the imager.