Patents by Inventor Jock F. Tomlinson

Jock F. Tomlinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7100058
    Abstract: A programmable power management integrated circuit includes analog input monitors that receive analog input signals that correspond to voltage, current, or temperature measurements. The analog input monitors apply programmable thresholds to the measurements and output the results to a programmable logic device, which may generate various status and/or control signals to the system being monitored. The programmable logic device controls FET drivers that can switch on and off power to the monitored system. The programmable power management integrated circuit may also comprise an internal oscillator, a serial interface, an in-system programmable interface, a joint test action group interface, a memory that stores identification information, and a register for capturing system information during power-down.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: August 29, 2006
    Assignee: Lattice Semiconductor Corporation
    Inventors: Jock F. Tomlinson, David C. Wilkinson, James J. Bennett, Douglas C. Morse
  • Patent number: 6735706
    Abstract: A programmable power management integrated circuit includes analog input monitors that receive analog input signals that correspond to voltage, current, or temperature measurements. The analog input monitors apply programmable thresholds to the measurements and output the results to a programmable logic device, which may generate various status and/or control signals to the system being monitored. The programmable logic device controls FET drivers that can switch on and off power to the monitored system. The programmable power management integrated circuit may also comprise an internal oscillator, a serial interface, an in-system programmable interface, a joint test action group interface, a memory that stores identification information, and a register for capturing system information during power-down.
    Type: Grant
    Filed: December 6, 2000
    Date of Patent: May 11, 2004
    Assignee: Lattice Semiconductor Corporation
    Inventors: Jock F. Tomlinson, David C. Wilkinson, James J. Bennett, Douglas C. Morse
  • Publication number: 20020104031
    Abstract: A programmable power management integrated circuit includes analog input monitors that receive analog input signals that correspond to voltage, current, or temperature measurements. The analog input monitors apply programmable thresholds to the measurements and output the results to a programmable logic device, which may generate various status and/or control signals to the system being monitored. The programmable logic device controls FET drivers that can switch on and off power to the monitored system. The programmable power management integrated circuit may also comprise an internal oscillator, a serial interface, an in-system programmable interface, a joint test action group interface, a memory that stores identification information, and a register for capturing system information during power-down.
    Type: Application
    Filed: December 6, 2000
    Publication date: August 1, 2002
    Inventors: Jock F. Tomlinson, David C. Wilkinson, James J. Bennett, Douglas C. Morse
  • Patent number: 5796750
    Abstract: A method for programming an in-system programmable logic device (IsPLD), using an automatic tester, includes the steps of: (i) expressing a fuse map for an IsPLD in the form of one or more test vectors to be applied in an automatic tester; (ii) including in a system board unprogrammed the IsPLD; (ii) mounting the system board on an automatic tester in a configuration for system testing; (iii) receiving into the automatic tester the test vectors; and (iv) and apply the test vectors to program the IsPLD. The system board with the IsPLD so programmed can proceed immediately to final test. In addition, a method is provided to translate a JEDEC file to a bit stream file, thereby achieving a eight-fold saving in storage requirement.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: August 18, 1998
    Assignee: Lattice Semiconductor Corporation
    Inventors: Michael W. Lottridge, Jock F. Tomlinson, Guy A. Townsend