Abstract: The disclosure relates to a method for tuning stress transitions of films on a substrate. The method includes forming a stress-adjustment layer on the substrate, wherein the stress-adjustment layer includes first regions formed of a first material and second regions formed of a second material, wherein the first material includes a first internal stress and the second material includes a second internal stress, and wherein the first internal stress is different compared to the second internal stress; and forming transition regions between the first regions and the second regions, wherein the transition regions include an interface between the first material and the second material that has a predetermined slope that is greater than zero degrees and less than 90 degrees.

Abstract: A method of forming a semiconductor device includes forming, over a hardmask layer and an underlying layer of a substrate, a pattern of first trenches between adjacent template lines, each of the first trenches exposing a portion of the hardmask layer, and each of the template lines including a mandrel and spacers on sidewalls of the mandrel; forming a pattern of first blocks over the pattern of the first trenches and the template lines, the first blocks dividing the first trenches to form a pattern of first stencil trenches; transferring the pattern of first stencil trenches to the hardmask layer to form a pattern of first hardmask trenches, each of the first hardmask trenches exposing a portion of the underlying layer; forming a first fill layer filling the first hardmask trenches and exposing the mandrels; selectively removing the mandrels to form second trenches, each of the second trenches exposing a portion of the hardmask layer; and forming a conformal liner in the second trenches and over a surface of

Abstract: In certain embodiments, a method includes depositing a photoresist layer over a semiconductor wafer to be patterned by photolithography, the photoresist layer having a first height, and exposing the photoresist layer to a pattern of actinic radiation to form exposed regions and non-exposed regions of the photoresist layer. The method further includes depositing an agent-containing layer over the photoresist layer and executing a post-exposure bake of the semiconductor wafer. The post-exposure bake modifies portions of the photoresist layer to form soluble portions of the photoresist layer for development. The soluble portions of the photoresist layer include the exposed regions and top portions of the non-exposed regions. The method further includes developing the photoresist layer to remove selectively the soluble portions, remaining portions of the non-exposed regions forming patterned structures of the semiconductor wafer and having a second height that is less than the first height.

Abstract: A method of forming a pattern on a substrate is provided. The method includes forming a first layer on an underlying layer of the substrate, where the first layer is patterned to have a first structure. The method also includes depositing a grafting material on side surfaces of the first structure, where the grafting material includes a solubility-shifting material. The method further includes diffusing the solubility-shifting material by a predetermined distance into a neighboring structure that abuts the solubility-shifting material, where the solubility-shifting material changes solubility of the neighboring structure in a developer, and removing soluble portions of the neighboring structure using the developer to form a second structure.

Abstract: A method for patterning a substrate in which a patterned photoresist structure can be formed on the substrate, the patterned photoresist structure having a sidewall. A conformal layer of spacer material can be deposited on the sidewall. The patterned photoresist structure can then be removed from the substrate, leaving behind the spacer material. Then, the substrate can be directionally etched using the sidewall spacer as an etch mask to form the substrate having a target critical dimension.

Abstract: A process includes forming, over a dielectric layer, a hardmask stack including a first layer below a second layer below a third layer below a fourth layer. The first and third layers include a different hardmask material from the second and fourth layers. A trench pattern including sidewall spacer structures is formed over the hardmask stack. The fourth layer is etched in a first region. The fourth and third layers are etched in a second region. The fourth and third layers are etched in a third region. The fourth layer is etched in a fourth region. The second and first layers are etched in the second and third regions. The third layer is etched in the first and fourth regions. In the dielectric layer, trenches are formed in the first and fourth regions, and via openings, deeper than the trenches, are formed in the second and third regions.

Abstract: A method for patterning a substrate in which a patterned photoresist structure can be formed on the substrate, the patterned photoresist structure having a sidewall. A conformal layer of spacer material can be deposited on the sidewall. The patterned photoresist structure can then be removed from the substrate, leaving behind the spacer material. Then, the substrate can be directionally etched using the sidewall spacer as an etch mask to form the substrate having a target critical dimension.

Abstract: A method of patterning a substrate, where the method includes: forming first structures over a memorization layer, the first structures including a first row of lines that are parallel with each other and spaced apart from each other; executing a first anti-spacer formation process to form first trenches along sidewalls of the first structures and sidewalls of a first fill material, the first trenches defining a first etch pattern; transferring the first etch pattern into the memorization layer and removing materials above the memorization layer; forming second structures over the memorization layer, the second structures including a second row of lines that are parallel with each other and spaced apart, placement of the second row of lines being shifted relative to the first row of lines; executing a second anti-spacer formation process to form second trenches formed along sidewalls of the second structures and sidewalls of a second fill material, the second trenches defining a second etch pattern; and trans

Abstract: In method of patterning a substrate, a first relief pattern is formed based on a first layer deposited over a substrate. Openings in the first relief pattern are filled with a reversal material. The first relief pattern is then removed from the substrate and the reversal material remains on the substrate to define a second relief pattern. A fill material is deposited over the substrate that is in contact with the second relief pattern, and sensitive to a photo-acid generated from a photo-acid generator in the second relief pattern. Selected portions of the second relief pattern are exposed to a first actinic radiation to generate the photo-acid in the selected portions of the second relief pattern. The photo-acid are driven from the selected portions of the second relief pattern into portions of the fill material so that the portions of the fill material to become soluble to a predetermined developer.

Abstract: In method of patterning a substrate, a first relief pattern is formed based on a first layer deposited over a substrate. Openings in the first relief pattern are filled with a reversal material. The first relief pattern is then removed from the substrate and the reversal material remains on the substrate to define a second relief pattern. A fill material is deposited over the substrate that is in contact with the second relief pattern, and sensitive to a photo-acid generated from a photo-acid generator in the second relief pattern. Selected portions of the second relief pattern are exposed to a first actinic radiation to generate the photo-acid in the selected portions of the second relief pattern. The photo-acid are driven from the selected portions of the second relief pattern into portions of the fill material so that the portions of the fill material to become soluble to a predetermined developer.

Abstract: In certain embodiments, a method for processing a semiconductor substrate includes depositing a resin film on a substrate that has microfabricated structures defining recesses. The resin film fills the recesses and covers the microfabricated structures. The method includes performing, using a photoacid generator (PAG)-based process, a localized removal of the resin film to remove the resin film to respective first depths in the recesses, at least two depths of the respective first depths being different depths. The method includes repeatedly performing, using a thermal acid generator (TAG)-based process and until a predetermined condition is met, a uniform removal of a remaining portion of the resin film to remove a substantially uniform depth of the resin film in the recesses.

Abstract: A method of forming sub-resolution features that includes: exposing a photoresist layer formed over a substrate to a first ultraviolet light (UV) radiation having a first wavelength of 365 nm or longer through a mask configured to form features at a first critical dimension, the photoresist layer including first portions exposed to the first UV radiation and second portions unexposed to the first UV radiation after exposing with the first UV radiation; exposing the first portions and the second portions to a second UV radiation; and developing the photoresist layer after exposing the photoresist layer to the second UV radiation to form the sub-resolution features having a second critical dimension less than the first critical dimension.

Abstract: A method of metallization includes receiving a substrate having a recess formed therein. The recess has a bottom and sidewalls, and a conformal liner is deposited on the bottom and sidewalls of the recess. The conformal liner is removed from an upper portion of the recess to expose upper sidewalls of the recess while leaving the conformal liner in a lower portion of the recess covering the bottom and lower sidewalls of the recess. Metal is deposited in a lower portion of the recess to form a metallization feature including the conformal liner in the lower portion of the recess and the metal.

Abstract: A method of forming a device includes depositing a first etch mask layer over a mandrel formed using a lithography process. The method includes depositing a second etch mask layer over the first etch mask layer. The method includes, using a first anisotropic etching process, etching the first etch mask layer and the second etch mask layer to form an etch mask including the first etch mask layer and the second etch mask layer. The method includes removing the mandrel to expose an underlying surface of the layer to be patterned. The method includes, using the etch mask, forming a feature by performing a second anisotropic etching process to pattern the layer to be patterned, where during the first anisotropic etching process, the first etch mask layer etches at a first rate and the second etch mask layer etches at a second rate, and where the first rate is different from the second rate.

Abstract: Techniques herein include methods for planarizing films including films used in the fabrication of semiconductor devices. Such fabrication can generate structures on a surface of a substrate, and these structures can have a spatially variable density across the surface. Planarization methods herein include depositing a first acid-labile film overtop the structures and the substrate, the first acid-labile film filling between the structures. A second acid-labile film is deposited overtop the first acid-labile film. An acid source film is deposited overtop the second acid-labile film, the acid source film including an acid generator configured to generate an acid in response to receiving radiation having a predetermined wavelength of light. A pattern of radiation is projected over the acid source film, the pattern of radiation having a spatially variable intensity at predetermined areas of the pattern of radiation.

Abstract: A method for forming a device includes receiving a substrate having nano-channels positioned over the substrate. A gate is formed all around a cross-section of the nano-channels, and the nano-channels extend in a direction parallel to a working surface of the substrate in a manner such that first nano-channels are positioned vertically above second nano-channels in a vertical stack. The method includes depositing a polymer mixture on the substrate that fills the open spaces around the nano-channels, causing self-assembly of the polymer mixture resulting in forming polymer cylinders extending parallel to the working surface of the substrate and perpendicular to the nano-channels, and metalizing the polymer cylinders sufficient to create an electrical connection to terminals of the nano-channels.

Abstract: The disclosure relates to techniques and methods for planarizing a substrate by amplifying and controlling z-height technology. Variability of z-height can be modeled or measured for each device. A counter height pattern can then be created and processed on a substrate. By using different materials with different etch rates, a planarizing pattern can be transferred to the substrate or system to create a planarized substrate surface for improved lithography. Additionally, a transition region slope can be precisely controlled using the same methods.

Abstract: A method of fabricating a semiconductor device is provided. The method includes forming BPR structures filled with a replacement BPR material, first S/D structures, first replacement silicide layers, and a pre-metallization dielectric that covers the first replacement silicide layers and the first S/D structures. The method also includes forming first interconnect openings in the pre-metallization dielectric and first replacement interconnect layers in the first interconnect openings. The first replacement interconnect layers are connected to the first replacement silicide layers. A thermal process is executed. The method further includes replacing, from a first side of the first wafer, a first group of the first replacement interconnect layers, a first group of the first replacement silicide layers, and the replacement BPR material, and replacing, from a second side of the first wafer, a second group of the first replacement interconnect layers, and a second group of the first replacement silicide layers.

Abstract: In certain embodiments, a method for processing a semiconductor substrate includes depositing a resin film on a substrate that has microfabricated structures defining recesses. The resin film fills the recesses and covers the microfabricated structures. The method includes performing, using a photoacid generator (PAG)-based process, a localized removal of the resin film to remove the resin film to respective first depths in the recesses, at least two depths of the respective first depths being different depths. The method includes repeatedly performing, using a thermal acid generator (TAG)-based process and until a predetermined condition is met, a uniform removal of a remaining portion of the resin film to remove a substantially uniform depth of the resin film in the recesses.

Abstract: A first source/drain (S/D) structure of a first transistor is formed on a substrate and positioned at a first end of a first channel structure of the first transistor. A first substitute silicide layer is deposited on a surface of the first S/D structure and made of a first dielectric. A second dielectric is formed to cover the first substitute silicide layer and the first S/D structure. A first interconnect opening is formed subsequently in the second dielectric to uncover the first substitute silicide layer. The first interconnect opening is filled with a first substitute interconnect layer, where the first substitute interconnect layer is made of a third dielectric. Further, a thermal processing of the substrate is executed. The first substitute interconnect layer and the first substitute silicide layer are removed. A first silicide layer is formed on the surfaces of the first S/D structure.