Patents by Inventor Joe Duigan

Joe Duigan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210376822
    Abstract: The present application provides a packaged gate drive circuit having a transformer. The transformer which is used to transfer both signals and power from a primary side to a secondary side. The windings of the transformer are formed using a combination of tracks and wirebond wires. The transformer is positioned in a well formed using a first insulating material and covered with a second insulating material.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 2, 2021
    Inventors: Andrew Thompson, Joe Duigan, Karl Rinne
  • Patent number: 6580299
    Abstract: A method and a digital circuit for synthesizing an input signal to produce an output signal are provided. The circuit includes a delay unit with a delay input and a delay output, a switch, and a controller. The selectively switch routes the input signal to the delay input whereafter the switch routes the delay output to the delay input. The controller controls the delay unit in response to the input signal and the output signal. A counter is provided to count a predetermined number of times the delay output is routed to the delay input whereafter the input signal is routed to the delay input to trigger the delay input. The digital circuit synthesizes the input signal to define a Delay-Locked loop (DLL) in which the delay unit is a voltage controlled delay line (VCDL). The invention extends to a computer program product executing the method and to an embedded circuit including the digital circuit.
    Type: Grant
    Filed: April 5, 2002
    Date of Patent: June 17, 2003
    Assignee: Parthus Ireland Limited
    Inventors: John Horan, Cyril Lahuec, Joe Duigan
  • Publication number: 20020163392
    Abstract: A method and a digital circuit for synthesizing an input signal to produce an output signal are provided. The circuit includes a delay unit with a delay input and a delay output, a switch, and a controller. The selectively switch routes the input signal to the delay input whereafter the switch routes the delay output to the delay input. The controller controls the delay unit in response to the input signal and the output signal. A counter is provided to count a predetermined number of times the delay output is routed to the delay input whereafter the input signal is routed to the delay input to trigger the delay input. The digital circuit synthesizes the input signal to define a Delay-Locked loop (DLL) in which the delay unit is a voltage controlled delay line (VCDL). The invention extends to a computer program product executing the method and to an embedded circuit including the digital circuit.
    Type: Application
    Filed: April 5, 2002
    Publication date: November 7, 2002
    Inventors: John Horan, Cyril Lahuec, Joe Duigan
  • Patent number: 6147583
    Abstract: A transformer (1) for a printed circuit board (2) is provided with physically separate flat metal windings (6) which are chosen to take the highest or the two highest currents handled by the transformer (1). The lower currents which will often include the power input to the primary are printed on the surfaces (3,4) of the printed circuit board (2). The flat metal windings (5) may be pre-assembled with the core halves (6,7).
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: November 14, 2000
    Assignee: Artesyn Technologies
    Inventors: Karl Rinne, Joe Duigan, Brian Gaynor, Frank Keane, Sean Spelman