Patents by Inventor Joe Keirouz

Joe Keirouz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dynamic buffer pool in PCIExpress switches
    Patent number: 8797857
    Abstract: In a first embodiment of the present invention, a method for handling a Transaction Layer Packets (TLPs) from devices in a switch is provided, the method comprising: subtracting a first number of credits from a credit pool associated with a first port on which a first device is connected; determining if the amount of credits in the credit pool associated with the first port is less than a first predetermined threshold; and if the amount of credits in the credit pool associated with the first port is less than the first predetermined threshold, assigning a second number of credits from a shared credit pool to the credit pool associated with the first port.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: August 5, 2014
    Assignee: PLX Technology, Inc.
    Inventors: Jeffrey Michael Dodson, Joe Keirouz
  • DYNAMIC BUFFER POOL IN PCIEXPRESS SWITCHES
    Publication number: 20110069704
    Abstract: In a first embodiment of the present invention, a method for handling a Transaction Layer Packets (TLPs) from devices in a switch is provided, the method comprising: subtracting a first number of credits from a credit pool associated with a first port on which a first device is connected; determining if the amount of credits in the credit pool associated with the first port is less than a first predetermined threshold; and if the amount of credits in the credit pool associated with the first port is less than the first predetermined threshold, assigning a second number of credits from a shared credit pool to the credit pool associated with the first port.
    Type: Application
    Filed: November 30, 2010
    Publication date: March 24, 2011
    Applicant: PLX Technology, Inc.
    Inventors: Jeffrey Michael DODSON, Joe KEIROUZ
  • Dynamic buffer pool in PCIExpress switches
    Patent number: 7869356
    Abstract: In a first embodiment of the present invention, a method for handling a Transaction Layer Packets (TLPs) from devices in a switch is provided, the method comprising: subtracting a first number of credits from a credit pool associated with a first port on which a first device is connected; determining if the amount of credits in the credit pool associated with the first port is less than a first predetermined threshold; and if the amount of credits in the credit pool associated with the first port is less than the first predetermined threshold, assigning a second number of credits from a shared credit pool to the credit pool associated with the first port.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: January 11, 2011
    Assignee: PLX Technology, Inc.
    Inventors: Jeffrey Michael Dodson, Joe Keirouz
  • DYNAMIC BUFFER POOL IN PCIEXPRESS SWITCHES
    Publication number: 20090154456
    Abstract: In a first embodiment of the present invention, a method for handling a Transaction Layer Packets (TLPs) from devices in a switch is provided, the method comprising: subtracting a first number of credits from a credit pool associated with a first port on which a first device is connected; determining if the amount of credits in the credit pool associated with the first port is less than a first predetermined threshold; and if the amount of credits in the credit pool associated with the first port is less than the first predetermined threshold, assigning a second number of credits from a shared credit pool to the credit pool associated with the first port.
    Type: Application
    Filed: December 16, 2008
    Publication date: June 18, 2009
    Applicant: PLX TECHNOLOGY, INC.
    Inventors: Jeffrey Michael DODSON, Joe KEIROUZ
  • Apparatus and methods for managing packets in a broadband data stream
    Patent number: 7400638
    Abstract: An exemplary method for writing packets in a data stream comprises the steps of dividing a packet into long packet cells and short packet cells, storing the long packet cells in a set of long cell queues and the short packet cells in a set of short cell queues, selectively pairing a long packet cell in one of the set of long cell queues with a short packet cell in one of the set of short cell queues to obtain an optimized pair of packet cells at each write cycle, and sequentially writing the optimized pair of packet cells at each write cycle to a set of memory banks.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: July 15, 2008
    Assignee: Tellabs San Jose, Inc.
    Inventors: Joe Keirouz, Simeon Ngo Sy, Robert Edward Liston
  • Apparatus and methods for managing packets in a broadband data stream
    Publication number: 20040196789
    Abstract: An exemplary method for writing packets in a data stream comprises the steps of dividing a packet into long packet cells and short packet cells, storing the long packet cells in a set of long cell queues and the short packet cells in a set of short cell queues, selectively pairing a long packet cell in one of the set of long cell queues with a short packet cell in one of the set of short cell queues to obtain an optimized pair of packet cells at each write cycle, and sequentially writing the optimized pair of packet cells at each write cycle to a set of memory banks.
    Type: Application
    Filed: April 20, 2004
    Publication date: October 7, 2004
    Applicant: Vivace Networks, Inc., a Delaware corporation
    Inventors: Joe Keirouz, Simeon Ngo Sy, Robert Edward Liston
  • Apparatus and methods for managing packets in a broadband data stream
    Patent number: 6741562
    Abstract: An exemplary method for writing packets in a data stream comprises the steps of dividing a packet into long packet cells and short packet cells, storing the long packet cells in a set of long cell queues and the short packet cells in a set of short cell queues, selectively pairing a long packet cell in one of the set of long cell queues with a short packet cell in one of the set of short cell queues to obtain an optimized pair of packet cells at each write cycle, and sequentially writing the optimized pair of packet cells at each write cycle to a set of memory banks.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: May 25, 2004
    Assignee: Tellabs San Jose, Inc.
    Inventors: Joe Keirouz, Simeon Ngo Sy, Robert Edward Liston