Abstract: The system and method of this invention simulates the flow of control of an application program targeted for a specific instruction set of a specific processor by utilizing a simulator running on a second processing system having a second processor with a different instruction set. The simulator reduces the number of translated instructions needed to simulate the flow of control of the first processor instructions by detecting, at the time of a store to memory, whether an instruction, data, or video is being updated. If the memory location that is being updated contains an instruction, the simulator takes additional steps to guarantee the correct execution of the modified instruction. If the simulator determines at the time of a store that the memory location being modified is data, the simulator needs to take no additional steps.

Abstract: A method to manage the operation of a coprocessor in a virtual memory type data processing system in which an Input/Output channel and an Input/output channel controller interconnect the coprocessor to the main processor and system memory. A Virtual Resource Manager (VRM) comprising a group of interrelated software programs function in the system to establish virtual machines that execute application programs concurrently. A Coprocessor Manager component of the VRM establishes a Virtual Machine in which the compressor executes application programs that cannot be executed on the main processor. The coprocessor is mounted on an integrated circuit card which is inserted into a `mother board` socket which contains the main processor and related components.