Patents by Inventor Joel B. GORMAN

Joel B. GORMAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11404771
    Abstract: Antennas, systems and methods may be implemented using a feed network with optional balanced to unbalanced conductor (balun) structure printed on one or more varying surfaces (e.g., sides, faces, etc.) of antenna substrates of various shapes including, but not limited to, flat, cylindrical, hemispherical and conical-shaped antenna substrates. Both antenna element/s and feed network/s may be printed onto one or more varying surfaces of a single common antenna substrate, such as printed onto both interior and exterior surfaces of the same hollow antenna substrate.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: August 2, 2022
    Assignee: L3 Technologies, Inc.
    Inventors: Joel B. Gorman, Brian Clark
  • Publication number: 20210194116
    Abstract: Antennas, systems and methods may be implemented using a feed network with optional balanced to unbalanced conductor (balun) structure printed on one or more varying surfaces (e.g., sides, faces, etc.) of antenna substrates of various shapes including, but not limited to, flat, cylindrical, hemispherical and conical-shaped antenna substrates. Both antenna element/s and feed network/s may be printed onto one or more varying surfaces of a single common antenna substrate, such as printed onto both interior and exterior surfaces of the same hollow antenna substrate.
    Type: Application
    Filed: December 19, 2019
    Publication date: June 24, 2021
    Inventors: Joel B. Gorman, Brian Clark
  • Patent number: 10206294
    Abstract: An electronic apparatus comprising: 1) a first circuit board; 2) a second circuit board substantially parallel to the first circuit board; and 3) an electrical assembly coupled between the first and second boards. The electrical assembly comprises: i) a housing; ii) a plurality of pogo pin connectors disposed within and projecting from the housing and configured to make electrical contact with the first and second circuit boards; and iii) a plurality of capacitors disposed within the housing and configured to form electrical connections with selected ones of the plurality of pogo pin connectors.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: February 12, 2019
    Assignee: L3 Technologies Inc.
    Inventors: David Nail, Matthew J. Spitzner, Joel B. Gorman
  • Publication number: 20180255653
    Abstract: An electronic apparatus comprising: 1) a first circuit board; 2) a second circuit board substantially parallel to the first circuit board; and 3) an electrical assembly coupled between the first and second boards. The electrical assembly comprises: i) a housing; ii) a plurality of pogo pin connectors disposed within and projecting from the housing and configured to make electrical contact with the first and second circuit boards; and iii) a plurality of capacitors disposed within the housing and configured to form electrical connections with selected ones of the plurality of pogo pin connectors.
    Type: Application
    Filed: March 3, 2017
    Publication date: September 6, 2018
    Applicant: L3 Technologies Inc.
    Inventors: David NAIL, Matthew J. SPITZNER, Joel B. GORMAN