Patents by Inventor Johann-Peter Forstner

Johann-Peter Forstner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080194206
    Abstract: A radio-frequency circuit has a signal processing unit for processing a symmetrical input signal, two signal inputs for receiving the symmetrical input signal, a connection which is used as a ground point for the symmetrical signal, and a line which connects the signal inputs and has a length which essentially corresponds to an odd-numbered multiple of half the wavelength of the input signal. A method for testing a radio-frequency circuit having a signal processing unit for processing a symmetrical input signal is additionally provided.
    Type: Application
    Filed: March 1, 2007
    Publication date: August 14, 2008
    Inventor: Johann Peter Forstner
  • Publication number: 20080001810
    Abstract: An integrated circuit has an input terminal, a first circuit portion having a first coupler coupled to the input terminal and a first mixer coupled to the first coupler. A first antenna terminal is coupled to the first coupler. A second circuit portion has a second coupler coupled to the input terminal and a second mixer coupled to the second coupler, and a second antenna terminal is coupled to the second coupler.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Inventors: Johann Peter Forstner, Bernhard Dehlink
  • Publication number: 20070285183
    Abstract: A circuit structure has a circuit portion with negative resistance and a test resonator structure. Furthermore, the circuit structure has a unit for coupling the test resonator structure to the circuit portion with negative resistance during testing and for decoupling the test resonator structure from the circuit portion with negative resistance after testing.
    Type: Application
    Filed: June 30, 2006
    Publication date: December 13, 2007
    Inventor: Johann Peter Forstner
  • Patent number: 7190220
    Abstract: A circuit for providing a base operating voltage for a bipolar transistor includes a UBE multiplier providing, in response to a working-point control current, a working voltage fed to a circuit for reducing the working voltage in order to generate a base operating voltage smaller than a base-emitter voltage drop of a bipolar power transistor. With this, the bipolar power transistor may be maintained in the class C operation in a flexible and robust manner, so that an amplifier with high efficiency is obtained.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: March 13, 2007
    Assignee: Infineon Technologies AG
    Inventors: Johann-Peter Forstner, Stephan Weber
  • Patent number: 7057271
    Abstract: A circuit chip has an apparatus for an electrically conductive connection of a terminal thereof to an external reference potential. The apparatus has a parallel connection of a bonding wire and a semiconductor area formed in a substrate of the circuit chip. The semiconductor area is doped higher than the substrate of the circuit chip.
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: June 6, 2006
    Assignee: Infineon Technologies AG
    Inventors: Johann-Peter Forstner, Stephan Weber
  • Publication number: 20060006948
    Abstract: A circuit for providing a base operating voltage for a bipolar transistor includes a UBE multiplier providing, in response to a working-point control current, a working voltage fed to a circuit for reducing the working voltage in order to generate a base operating voltage smaller than a base-emitter voltage drop of a bipolar power transistor. With this, the bipolar power transistor may be maintained in the class C operation in a flexible and robust manner, so that an amplifier with high efficiency is obtained.
    Type: Application
    Filed: January 10, 2005
    Publication date: January 12, 2006
    Applicant: Infineon Technologies AG
    Inventors: Johann-Peter Forstner, Stephan Weber
  • Publication number: 20050128003
    Abstract: A transistor assembly includes a plurality of transistors, a current path for feeding an operating current for the transistor assembly and a plurality of sub-current paths branching off from the current path for feeding a respective operating current for the transistors. A resistor is connected into one of the sub-current paths, wherein a voltage across the resistor is a measure of the operating current of the transistor assembly.
    Type: Application
    Filed: September 17, 2004
    Publication date: June 16, 2005
    Applicant: Infineon Technologies AG
    Inventor: Johann-Peter Forstner
  • Publication number: 20050067697
    Abstract: A circuit chip has an apparatus for an electrically conductive connection of a terminal thereof to an external reference potential. The apparatus has a parallel connection of a bonding wire and a semiconductor area formed in a substrate of the circuit chip. The semiconductor area is doped higher than the substrate of the circuit chip.
    Type: Application
    Filed: August 4, 2004
    Publication date: March 31, 2005
    Applicant: Infineon Technologies AG
    Inventors: Johann-Peter Forstner, Stephan Weber
  • Patent number: 6529065
    Abstract: A circuit configuration for actuating a power amplifier transistor is described, which is intended to ensure that the power consumption is as low as possible while having a variable output power. Such a circuit is particularly suitable for amplifiers in mobile telephones. In particular, a circuit configuration is described which controls at least two different operating points for at least two different output power ranges. At a first operating point, the quiescent current in the power amplifier transistor is controlled by a first balanced circuit having a temperature-compensating active feedback circuit. At a second operating point, the quiescent current in the power amplifier transistor is controlled by a second balanced circuit, having a second feedback circuit. A third operating range is used in saturation mode, which ensures maximum power efficiency with the maximum output power, although this results in the gain being only partially linear.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: March 4, 2003
    Assignee: Infineon Technologies AG
    Inventors: Johann-Peter Forstner, Franz-Xaver Sinnesbichler
  • Publication number: 20010048347
    Abstract: A circuit configuration for actuating a power amplifier transistor is described, which is intended to ensure that the power consumption is as low as possible while having a variable output power. Such a circuit is particularly suitable for amplifiers in mobile telephones. In particular, a circuit configuration is described which controls at least two different operating points for at least two different output power ranges. At a first operating point, the quiescent current in the power amplifier transistor is controlled by a first balanced circuit having a temperature-compensating active feedback circuit. At a second operating point, the quiescent current in the power amplifier transistor is controlled by a second balanced circuit, having a second feedback circuit. A third operating range is used in saturation mode, which ensures maximum power efficiency with the maximum output power, although this results in the gain being only partially linear.
    Type: Application
    Filed: May 23, 2001
    Publication date: December 6, 2001
    Inventors: Johann-Peter Forstner, Franz-Xaver Sinnesbichler
  • Patent number: 6255910
    Abstract: An amplifier circuit containing at least one output stage transistor, a circuit for compensating for quiescent current drifts and optionally components for driving the output stage transistor. The circuit for compensating for quiescent current drifts has at least one reference current field-effect transistor with a gate electrode where the gate electrode is disposed in a region of the electrodes of the output stage transistor. Additionally, the reference current field-effect transistor is situated on a common chip area with the output stage transistor. Furthermore, the use of the above amplifier circuit in mobile radio systems is described.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: July 3, 2001
    Assignee: Infineon Technologies AG
    Inventor: Johann-Peter Forstner