Patents by Inventor Johannes Georg Bednorz
Johannes Georg Bednorz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8688181Abstract: A new class of superconducting compositions, and methods for making and using them are described. These compositions exhibit superconductivity at temperatures in excess of 26° K. and are comprised of transition metal oxides having at least one additional element therein which may create a multivalent state of the transition metal oxide. The composition can be a ceramic-like material having a layer-like crystalline structure, where the structure is distorted having either an oxygen excess or deficiency. An example is RE-AE-TM-O, where RE is a rare earth or rare earth-like element, AE is an alkaline earth element, TM is a transition metal element (such as Cu) and O is oxygen.Type: GrantFiled: September 9, 1994Date of Patent: April 1, 2014Assignee: International Business Machines CorporationInventors: Johannes Georg Bednorz, Carl Alexander Mueller
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Patent number: 8060169Abstract: A new class of superconducting compositions, and methods for making and using them are described. These compositions exhibit superconductivity at temperatures in excess of 26° K. and are comprised of transition metal oxides having at least one additional element therein which may create a multi-valent state of the transition metal oxide. The composition can be a ceramic-like material having a layer-like crystalline structure, where the structure is distorted having either an oxygen excess or deficiency. An example is RE-AE-TM-O, where RE is a rare earth or rare earth-like element, AE is an alkaline earth element, TM is a transition metal element (such as Cu) and O is oxygen.Type: GrantFiled: June 7, 1995Date of Patent: November 15, 2011Assignee: International Business Machines CorporationInventors: Johannes Georg Bednorz, Carl Alexander Mueller
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Patent number: 7872901Abstract: A memory cell (10) includes a resistive structure (1), and at least two electrodes (2) coupled to the resistive structure (1), wherein: the resistive structure (1) includes hydrogen, and the resistive structure (1) includes a material that exhibits a hydrogen ion mobility value of at least 10?8cm2/Vs.Type: GrantFiled: December 17, 2007Date of Patent: January 18, 2011Assignee: International Business Machines CorporationInventors: Johannes Georg Bednorz, Siegfried F. Karg, Gerhard Ingmar Meijer
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Patent number: 7465952Abstract: A memory element comprises a first number of electrodes and a second number of electrically conducting channels between sub-groups of two of said electrodes, the channels exhibiting an electrical resistance that is reversibly switchable between different states, wherein the first number is larger than two and the second number is larger than the first number divided by two. The electrically conducting channels may be provided in transition metal oxide material, which exhibits a reversibly switchable resistance that is attributed to a switching phenomenon at the interfaces between the electrodes and the transition metal oxide material.Type: GrantFiled: September 29, 2005Date of Patent: December 16, 2008Assignee: International Business Machines CorporationInventors: Santos F. Alvarado, Johannes Georg Bednorz, Gerhard Ingmar Meijer
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Publication number: 20080164455Abstract: A memory element comprises a first number of electrodes and a second number of electrically conducting channels between sub-groups of two of said electrodes, the channels exhibiting an electrical resistance that is reversibly switchable between different states, wherein the first number is larger than two and the second number is larger than the first number divided by two. The electrically conducting channels may be provided in transition metal oxide material, which exhibits a reversibly switchable resistance that is attributed to a switching phenomenon at the interfaces between the electrodes and the transition metal oxide material.Type: ApplicationFiled: March 12, 2008Publication date: July 10, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Santos F. Alvarado, Johannes Georg Bednorz, Gerhard Ingmar Meijer
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Publication number: 20080152932Abstract: The present invention relates to a memory cell (10) comprising: a resistive structure (1), and at least two electrodes (2) coupled to the resistive structure (1), wherein: the resistive structure (1) comprises hydrogen, and the resistive structure (1) comprises a material that exhibits a hydrogen ion mobility value of at least 10?8 cm2/Vs.Type: ApplicationFiled: December 17, 2007Publication date: June 26, 2008Applicant: International Business Machines CorporationInventors: Johannes Georg Bednorz, Siegfried F. Karg, Gerhard Ingmar Meijer
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Patent number: 7376006Abstract: A nonvolatile memory cell includes a bipolar programmable storage element operative to store a logic state of the memory cell, and a metal-oxide-semiconductor device including first and second source/drains and a gate. A first terminal of the bipolar programmable storage element is adapted for connection to a first bit line. The first source/drain is connected to a second terminal of the bipolar programmable storage element, the second source/drain is adapted for connection to a second bit line, and the gate is adapted for connection to a word line.Type: GrantFiled: August 31, 2005Date of Patent: May 20, 2008Assignee: International Business Machines CorporationInventors: Johannes Georg Bednorz, John Kenneth DeBrosse, Chung Hon Lam, Gerhard Ingmar Meijer, Jonathan Zanhong Sun
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Patent number: 7324366Abstract: A nonvolatile memory array includes a plurality of word lines, a plurality of bit lines, a plurality of source lines, and a plurality of nonvolatile memory cells. Each of at least a subset of the plurality of memory cells has a first terminal connected to one of the plurality of word lines, a second terminal connected to one of the plurality of bit lines, and a third terminal connected to one of the plurality of source lines. At least one of the memory cells includes a bipolar programmable storage element operative to store a logic state of the memory cell, a first terminal of the bipolar programmable storage element connecting to one of a corresponding first one of the bit lines and a corresponding first one of the source lines, and a metal-oxide-semiconductor device including first and second source/drains and a gate.Type: GrantFiled: April 21, 2006Date of Patent: January 29, 2008Assignee: International Business Machines CorporationInventors: Johannes Georg Bednorz, Chung Hon Lam, Gerhard Ingmar Meijer
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Publication number: 20080011996Abstract: The present invention provides a microelectronic device comprising a resistance structure including a plurality of programmable resistance layers and at least one intermediate layer such that an intermediate layer is placed between two programmable resistance layers. The programmable resistance layers can be individually doped or may consist of different materials. Each programmable resistance layer may be optimized for a specific application. The microelectronic device can be used as a programmable resistor or a memory cell as it exhibits switchable electrical resistance and does not require a time-consuming conditioning process.Type: ApplicationFiled: July 11, 2006Publication date: January 17, 2008Inventors: Johannes Georg Bednorz, Walter Heinrich Riess, Siegfried F. Karg, Gerhard Ingmar Meijer, German Hammerl
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Patent number: 6717199Abstract: A method for tailoring properties of high k thin layer perovskite materials, and devices comprising such insulators are herein presented. The method comprise the steps of, first, substantially completing the manufacture of a device, which device contains the high k insulator in a polycrystalline form. The device, such as a capacitor, or an FET, went through the typically high temperature manufacturing process of a fabrication line. In the next step, the device is in situ ion implanted with such a dose and energy to convert a fraction of the polycrystalline material into an amorphous material state, hereby tailoring the properties of the insulator. The fraction of polycrystalline material converted to amorphous material might be 1. This process can be applied to many electronic devices and some optical devices. The process results in novel perovskite thin layer materials and novel devices fabricated with such materials.Type: GrantFiled: April 4, 2003Date of Patent: April 6, 2004Assignee: International Business Machines CorporationInventors: Robert Benjamin Laibowitz, John David Baniecki, Johannes Georg Bednorz, Jean-Pierre A. Locquet
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Publication number: 20030209745Abstract: A method for tailoring properties of high k thin layer perovskite materials, and devices comprising such insulators are herein presented. The method comprise the steps of, first, substantially completing the manufacture of a device, which device contains the high k insulator in a polycrystalline form. The device, such as a capacitor, or an FET, went through the typically high temperature manufacturing process of a fabrication line. In the next step, the device is in situ ion implanted with such a dose and energy to convert a fraction of the polycrystalline material into an amorphous material state, hereby tailoring the properties of the insulator. The fraction of polycrystalline material converted to amorphous material might be 1. This process can be applied to many electronic devices and some optical devices. The process results in novel perovskite thin layer materials and novel devices fabricated with such materials.Type: ApplicationFiled: April 4, 2003Publication date: November 13, 2003Applicant: International Business Machines CorporationInventors: Robert Benjamin Laibowitz, John David Baniecki, Johannes Georg Bednorz, Jean-Pierre A. Locquet
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Patent number: 6593181Abstract: A method for tailoring properties of high k thin layer perovskite materials, and devices comprising such insulators are herein presented. The method comprise the steps of, first, substantially completing the manufacture of a device, which device contains the high k insulator in a polycrystalline form. The device, such as a capacitor, or an FET, went through the typically high temperature manufacturing process of a fabrication line. In the next step, the device is in situ ion implanted with such a dose and energy to convert a fraction of the polycrystalline material into an amorphous material state, hereby tailoring the properties of the insulator. The fraction of polycrystalline material converted to amorphous material might be 1. This process can be applied to many electronic devices and some optical devices. The process results in novel perovskite thin layer materials and novel devices fabricated with such materials.Type: GrantFiled: April 20, 2001Date of Patent: July 15, 2003Assignee: International Business Machines CorporationInventors: Robert Benjamin Laibowitz, John David Baniecki, Johannes Georg Bednorz, Jean-Pierre A. Locquet
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Publication number: 20020153549Abstract: A method for tailoring properties of high k thin layer perovskite materials, and devices comprising such insulators are herein presented. The method comprise the steps of, first, substantially completing the manufacture of a device, which device contains the high k insulator in a polycrystalline form. The device, such as a capacitor, or an FET, went through the typically high temperature manufacturing process of a fabrication line. In the next step, the device is in situ ion implanted with such a dose and energy to convert a fraction of the polycrystalline material into an amorphous material state, hereby tailoring the properties of the insulator. The fraction of polycrystalLine material converted to amorphous material might be 1. This process can be applied to many electronic devices and some optical devices. The process results in novel perovskite thin layer materials and novel devices fabricated with such materials.Type: ApplicationFiled: April 20, 2001Publication date: October 24, 2002Inventors: Robert Benjamin Laibowitz, John David Baniecki, Johannes Georg Bednorz, Jean-Pierre A. Locquet
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Patent number: 5648321Abstract: Described is a process for manufacturing thin films by periodically depositing (DEP) a number of block layers consisting of different base materials on a substrate (multilayer deposition), wherein the thickness of the layers (LT) is restricted to one to 20 monolayers and deposition as well as crystallization of the thin film is completed at approximately constant temperature without performing a separate annealing step. The method can be used to produce thin films of high-T.sub.c -superconductors. It allows a better control of the crystal growth of ternary or higher compounds with comparatively large unit cells.Type: GrantFiled: September 13, 1993Date of Patent: July 15, 1997Assignee: International Business Machines CorporationInventors: Johannes Georg Bednorz, Andrei Catana, Jean Pierre Locquet, Erich Maechler, Carl Alexander Mueller