Abstract: A sensing device with a phase locked loop circuit that has an oscillator to provide an oscillator output signal is presented. The sensing device has a power amplifier to provide at an output of the power amplifier an amplified output signal based on the oscillator output signal. The amplified output signal has an interfering signal component at the oscillator frequency. The sensing device has a measurement circuit to measure offset information regarding a frequency offset between the oscillator frequency and a target frequency of the oscillator. The frequency offset is due to a frequency pulling effect at the oscillator caused by the interfering signal component of the amplified output signal. The sensing device has a control circuit to use the offset information for trimming the phase locked loop circuit and/or the power amplifier, and/or for determining information regarding an environmental situation at the output of the power amplifier.

Abstract: A frequency divider unit to receive an oscillating signal and to update, at an output of the frequency divider unit, a frequency-divided oscillating signal is presented. The frequency divider unit has a first clocked signal inverter to update, clocked based on the oscillating signal, a first intermediate signal at an output of the first clocked signal inverter. The frequency divider unit has a second clocked signal inverter, wherein the output of the first clocked signal inverter may be connected to an input of the second clocked signal inverter, and wherein the second clocked signal inverter updates, clocked based on the oscillating signal, a second intermediate signal at an output of the second clocked signal inverter. The frequency divider unit has a continuously operating signal inverter coupled between the output of the second clocked signal inverter and the input of the first clocked signal inverter.

Abstract: An impedance detector for measuring an impedance of a circuit comprises a frequency source, a resistor connected in between the frequency source and the circuit to be measured, a phase shift circuit for applying a phase shift to a signal from the frequency source, a first multiplier for mixing the signal from the frequency source with a signal from the circuit to be measured, a second multiplier for mixing the phase shifted signal with the signal from the circuit to be measured, and a processing circuit for determining an indication of an impedance of the circuit to be measured in dependence on the first mixed signal and the second mixed signal.

Abstract: An integrated circuit, comprising a single-ended pin for transmitting and/or receiving an RF signal. A first matching network is configured to match an impedance of the RF signal. A second matching network is configured to match an impedance of an on-chip differential circuit. A third matching network is configured to match an impedance of an on-chip single-ended circuit, wherein the third matching network is connectable to the first matching network. A transformer is connected or connectable to the second matching network and to the first matching network. Switches control an operating mode of the integrated circuit The second matching network is connected with the first matching network via the transformer, or the third matching network is connected with the first matching network.

Abstract: An impedance detector for measuring an impedance of a circuit comprises a frequency source, a resistor connected in between the frequency source and the circuit to be measured, a phase shift circuit for applying a phase shift to a signal from the frequency source, a first multiplier for mixing the signal from the frequency source with a signal from the circuit to be measured, a second multiplier for mixing the phase shifted signal with the signal from the circuit to be measured, and a processing circuit for determining an indication of an impedance of the circuit to be measured in dependence on the first mixed signal and the second mixed signal.

Abstract: An integrated circuit, comprising a single-ended pin for transmitting and/or receiving an RF signal. A first matching network is configured to match an impedance of the RF signal. A second matching network is configured to match an impedance of an on-chip differential circuit. A third matching network is configured to match an impedance of an on-chip single-ended circuit, wherein the third matching network is connectable to the first matching network. A transformer is connected or connectable to the second matching network and to the first matching network. Switches control an operating mode of the integrated circuit The second matching network is connected with the first matching network via the transformer, or the third matching network is connected with the first matching network.