Abstract: A chip stack comprising a flex circuit which itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface of the substrate in spaced relation to each other are at least first and second top conductive patterns. Similarly, disposed on the bottom surface of the substrate in spaced relation to each other are at least first and second bottom conductive patterns. The first top and bottom conductive patterns are electrically connected to each other, as are the second top and bottom conductive patterns. At least one top chip package including a first packaged chip is electrically connected to the first top conductive pattern, with at least one bottom chip package including a second packaged chip being electrically connected to the second bottom conductive pattern. The substrate is folded such that the second top conductive pattern is electrically connected to the top chip package.

Abstract: A stackable integrated circuit chip package comprising a carrier and a flex circuit. The flex circuit itself comprises a flexible substrate having opposed top and bottom surfaces, and a conductive pattern which is disposed on the substrate. The chip package further comprises an integrated circuit chip which is electrically connected to the conductive pattern. The substrate is wrapped about and attached to at least a portion of the carrier such that the conductive pattern defines first and second portions which are each electrically connectable to another stackable integrated circuit chip package. The carrier is sized and configured to be releasably attachable to the carrier of at least one other identically configured stackable integrated circuit chip package in a manner wherein the chip packages, when attached to each other, are maintained in registry along first and second axes which are generally co-planar and extend in generally perpendicular relation to each other.

Abstract: A chip stack comprising a flex circuit which itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface of the substrate in spaced relation to each other are at least first and second top conductive patterns. Similarly, disposed on the bottom surface of the substrate in spaced relation to each other are at least first and second bottom conductive patterns. The first top and bottom conductive patterns are electrically connected to each other, as are the second top and bottom conductive patterns. At least one top chip package including a first packaged chip is electrically connected to the first top conductive pattern, with at least one bottom chip package including a second packaged chip being electrically connected to the second bottom conductive pattern. The substrate is folded such that the second top conductive pattern is electrically connected to the top chip package.

Abstract: A chip stack comprising a flex circuit which itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface of the substrate in spaced relation to each other are at least first and second top conductive patterns. Similarly, disposed on the bottom surface of the substrate in spaced relation to each other are at least first and second bottom conductive patterns. The first top and bottom conductive patterns are electrically connected to each other, as are the second top and bottom conductive patterns. At least one top chip package including a first packaged chip is electrically connected to the first top conductive pattern, with at least one bottom chip package including a second packaged chip being electrically connected to the second bottom conductive pattern. The substrate is folded such that the second top conductive pattern is electrically connected to the top chip package.

Abstract: A chip stack comprising a flex circuit which itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface of the substrate in spaced relation to each other are at least first and second top conductive patterns. Similarly, disposed on the bottom surface of the substrate in spaced relation to each other are at least first and second bottom conductive patterns. The first top and bottom conductive patterns are electrically connected to each other, as are the second top and bottom conductive patterns. At least one top chip package including a first packaged chip is electrically connected to the first top conductive pattern, with at least one bottom chip package including a second packaged chip being electrically connected to the second bottom conductive pattern. The substrate is folded such that the second top conductive pattern is electrically connected to the top chip package.

Abstract: A stackable integrated circuit chip package comprising a carrier and a flex circuit. The flex circuit itself comprises a flexible substrate having opposed top and bottom surfaces, and a conductive pattern which is disposed on the substrate. The chip package further comprises an integrated circuit chip which is electrically connected to the conductive pattern. The substrate is wrapped about and attached to at least a portion of the carrier such that the conductive pattern defines first and second portions which are each electrically connectable to another stackable integrated circuit chip package. The carrier is sized and configured to be releasably attachable to the carrier of at least one other identically configured stackable integrated circuit chip package in a manner wherein the chip packages, when attached to each other, are maintained in registry along first and second axes which are generally co-planar and extend in generally perpendicular relation to each other.

Abstract: A stackable integrated circuit chip package comprising a flex circuit. The flex circuit itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface is a first conductive pad array, while disposed on the bottom surface is a second conductive pad array and third and fourth conductive pad arrays which are positioned on opposite sides of the second conductive pad array and electrically connected thereto. The chip package further comprises an integrated circuit chip which is electrically connected to the first and second conductive pad arrays, and hence to the third and fourth conductive pad arrays. The substrate is wrapped about at least a portion of the integrated circuit chip such that the third and fourth conductive pad arrays collectively define a fifth conductive pad array which is electrically connectable to another stackable integrated circuit chip package.

Abstract: A single sided module comprising a substrate which defines opposed first and second sides and includes a conductive pattern thereon. In addition to the substrate, the module comprises at least two chip stacks which are disposed on only the first side of the substrate and electrically connected to the conductive pattern. The chip stacks are placed into electrical communication with each other by the conductive pattern. The conductive pattern itself comprises a multiplicity of conductive pads which are disposed on only the first side of the substrate, and a multiplicity of conductive traces which electrically connect respective pairs of the conductive pads to each other. The conductive traces are themselves disposed on and extend along only the first side of the substrate, with the chip stacks being electrically connected to respective sets of the conductive pads.

Abstract: A stackable integrated circuit chip package comprising a flex circuit. The flex circuit itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface is a first conductive pad array, while disposed on the bottom surface is a second conductive pad array and third and fourth conductive pad arrays which are positioned on opposite sides of the second conductive pad array and electrically connected thereto. The chip package further comprises an integrated circuit chip which is electrically connected to the first and second conductive pad arrays, and hence to the third and fourth conductive pad arrays. The substrate is wrapped about at least a portion of the integrated circuit chip such that the third and fourth conductive pad arrays collectively define a fifth conductive pad array which is electrically connectable to another stackable integrated circuit chip package.

Abstract: A stackable integrated circuit chip package comprising a flex circuit. The flex circuit itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface is a first conductive pad array, while disposed on the bottom surface is a second conductive pad array and third and fourth conductive pad arrays which are positioned on opposite sides of the second conductive pad array and electrically connected thereto. The chip package further comprises an integrated circuit chip which is electrically connected to the first and second conductive pad arrays, and hence to the third and fourth conductive pad arrays. The substrate is wrapped about at least a portion of the integrated circuit chip such that the third and fourth conductive pad arrays collectively define a fifth conductive pad array which is electrically connectable to another stackable integrated circuit chip package.

Abstract: An integrated circuit chip stack includes a stack of chip packages mounted on a substrate. Each chip package includes a plastic packaged chip mounted within a central aperture in a thin, planar frame by soldering leads at opposite ends of the plastic package to conductive pads on an upper surface of the frame adjacent the central aperture. Conductive traces and vias couple the conductive pads to other conductive pads on upper and lower surfaces of the frame adjacent outer edges thereof. The conductive pads adjacent the outer edges are soldered to the conductive pads of adjacent chip packages by dipping the edges of an assembled stack of the chip packages in solder. The chip stack thus formed is mounted on a substrate. Each chip package can be individually addressed by the substrate, such as to enable the chip therein, using a stair step arrangement of the conductive pads in which the pads on the opposite surfaces of each frame are coupled in offset fashion by vias extending through the frame.

Abstract: A stackable integrated circuit chip package comprising a flex circuit. The flex circuit itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface is a first conductive pad array, while disposed on the bottom surface is a second conductive pad array and third and fourth conductive pad arrays which are positioned on opposite sides of the second conductive pad array and electrically connected thereto. The chip package further comprises an integrated circuit chip which is electrically connected to the first and second conductive pad arrays, and hence to the third and fourth conductive pad arrays. The substrate is wrapped about at least a portion of the integrated circuit chip such that the third and fourth conductive pad arrays collectively define a fifth conductive pad array which is electrically connectable to another stackable integrated circuit chip package.