Patents by Inventor John A. Welsh

John A. Welsh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030224382
    Abstract: The invention provides a method of measuring the level of two or more nucleic acid molecules in a target by contacting a probe with a target comprising two or more nucleic acid molecules, wherein the nucleic acid molecules are arbitrarily sampled and wherein the arbitrarily sampled nucleic acid molecules comprise a subset of the nucleic acid molecules in a population of nucleic acid molecules; and detecting the amount of specific binding of the target to the probe. The invention also provides a method of measuring the level of two or more nucleic acid molecules in a target by contacting a probe with a target comprising two or more nucleic acid molecules, wherein the nucleic acid molecules are statistically sampled and wherein the statistically sampled nucleic acid molecules comprise a subset of the nucleic acid molecules in a population of nucleic acid molecules; and detecting the amount of specific binding of the target to the probe.
    Type: Application
    Filed: November 7, 2002
    Publication date: December 4, 2003
    Applicant: Sidney Kimmel Cancer Center
    Inventors: Michael McClelland, John Welsh, Thomas Trenkle
  • Publication number: 20030096157
    Abstract: A lithium dioxide cell construction including a resettable positive temperature coefficient fuse. The positive temperature coefficient fuse, can withstand shock and mechanical vibration without damage and is mounted in such a way that it cannot be bypassed without destroying the cell. If the cell is shorted out, within a few seconds, the positive temperature coefficient fuse limits the fault current to a low value, which will never allow the cell to overheat or vent.
    Type: Application
    Filed: October 11, 2002
    Publication date: May 22, 2003
    Inventor: John Welsh
  • Patent number: 6566053
    Abstract: The detection of insertions and/or deletions in reiterated nucleotide sequences in tissues provides an identification of neoplastic changes that are associated with malignancy. The mutations are preferably detected by PCR based amplification of target sequences using selected primers, followed by standard analytic procedures. The detection of these mutations is useful as a diagnostic tool for cancer development and has direct application for cancer prognosis.
    Type: Grant
    Filed: December 27, 1995
    Date of Patent: May 20, 2003
    Assignee: Stratagene
    Inventors: Manuel Perucho, Miguel Angel Peinado, Yurij Ionov, Sergei Malkhosyan, Michael McClelland, John Welsh
  • Patent number: 6524654
    Abstract: In accordance with the present invention, a method of treating the surface of an organic substrate, particularly a circuitized surface of an organic substrate, which method reduces the spread of adhesive resin that is subsequently deposited on the surface, is provided. This method comprises the steps of applying a treatment solution comprising a fatty acid compound, an alkalizing agent, and a solvent comprising water and from about 5% to about 90% by volume of an organic solvent selected from the group consisting of an alcohol, a glycol ether, and combinations thereof to the surface; and then removing substantially all of the solvent from the solution to provide a thin film on the surface of said substrate. The film comprises the fatty acids that were present in the treatment solution. In a preferred embodiment the treatment solution further comprises a chelating agent.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: February 25, 2003
    Assignee: International Business Machines Corporation
    Inventors: John Joseph Konrad, Konstantinos I. Papathomas, John A. Welsh
  • Patent number: 6495319
    Abstract: The invention provides a method of measuring the level of two or more nucleic acid molecules in a target by contacting a probe with a target comprising two or more nucleic acid molecules, wherein the nucleic acid molecules are arbitrarily sampled and wherein the arbitrarily sampled nucleic acid molecules comprise a subset of the nucleic acid molecules in a population of nucleic acid molecules; and detecting the amount of specific binding of the target to the probe. The invention also provides a method of measuring the level of two or more nucleic acid molecules in a target by contacting a probe with a target comprising two or more nucleic acid molecules, wherein the nucleic acid molecules are statistically sampled and wherein the statistically sampled nucleic acid molecules comprise a subset of the nucleic acid molecules in a population of nucleic acid molecules; and detecting the amount of specific binding of the target to the probe.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: December 17, 2002
    Assignee: Sidney Kimmel Cancer Center
    Inventors: Michael McClelland, John Welsh, Thomas Trenkle
  • Patent number: 6488198
    Abstract: A process and apparatus are described for wire bonding circuit pads of large scale integrated design. The bonding process employs a capillary tool that applies heat and pressure to the wires in order to bond them to the circuit pad. The circuit pad is supported upon a closed woven, fiberglass mesh, which supports the circuit pad during the bonding process.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: December 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: Douglas E. Chrzanowski, John A. Welsh, James W. Wilson, Jeffrey A. Zimmerman
  • Patent number: 6453549
    Abstract: A method for conductively filling a hole or via disposed in an electronic package to provide a structure having a lower coefficient of thermal expansion. After fabricating a through hole or a plated through hole in an electronic package, the hole or via is filled with metal, and the surface of the electronic package is sealed.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: September 24, 2002
    Assignee: International Business Machines Corporation
    Inventors: Anilkumar C. Bhatt, David E. Houser, John A. Welsh
  • Patent number: 6432182
    Abstract: In accordance with the present invention, a method of treating the surface of an organic substrate, particularly a circuitized surface of an organic substrate, which method reduces the spread of adhesive resin that is subsequently deposited on the surface, is provided. This method comprises the steps of applying a treatment solution comprising a fatty acid compound, an alkalizing agent, and a solvent comprising water and from about 5% to about 90% by volume of an organic solvent selected from the group consisting of an alcohol, a glycol ether, and combinations thereof to the surface; and then removing substantially all of the solvent from the solution to provide a thin film on the surface of said substrate. The film comprises the fatty acids that were present in the treatment solution. In a preferred embodiment the treatment solution further comprises a chelating agent.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: August 13, 2002
    Assignee: International Business Machines Corporation
    Inventors: John Joseph Konrad, Konstantinos I. Papathomas, John A. Welsh
  • Publication number: 20010041308
    Abstract: A technique is provided for forming a circuitized substrate which substantially reduces defects in a circuit board formed of multiple layers of dielectric material on each of which layers electrical circuitry is formed. Each layer of dielectric material is formed of two distinct and separate coatings or sheets or films of a photopatternable dielectric material which is photoformed to provide through openings to the layer of circuitry below and then plated with the desired circuitry including plating in the photoformed openings to form vias. In this way if there is a pin hole type defect in either coating or sheet of dielectric material, in all probability it will not align with a similar defect in the other sheet or coating of the dielectric layer, thus preventing unwanted plating extending from one layer of circuitry to the underlying layer of circuitry.
    Type: Application
    Filed: July 17, 2001
    Publication date: November 15, 2001
    Applicant: International Business Machines Corporation
    Inventors: Ashwinkumar C. Bhatt, John C. Camp, Mary Beth Fletcher, Kenneth Lynn Potter, John A. Welsh
  • Publication number: 20010016462
    Abstract: A process and apparatus are described for wire bonding circuit devices of large scale integrated design. The bonding process employs a capillary tool that applies heat and pressure to the wires in order to bond them to the circuit device. The circuit device, or pad, is supported upon a closed woven, fiberglass mesh, which supports the circuit device during the bonding process.
    Type: Application
    Filed: April 9, 2001
    Publication date: August 23, 2001
    Applicant: International Business Machines Corporation
    Inventors: Douglas E. Chrzanowski, John A. Welsh, James W. Wilson, Jeffrey A. Zimmerman
  • Patent number: 6274291
    Abstract: A technique is provided for forming a circuitized substrate which substantially reduces defects in a circuit board formed of multiple layers of dielectric material on each of which layers electrical circuitry is formed. Each layer of dielectric material is formed of two distinct and separate coatings or sheets or films of a photopatternable dielectric material which is photoformed to provide through openings to the layer of circuitry below and then plated with the desired circuitry including plating in the photoformed openings to form vias. In this way if there is a pin hole type defect in either coating or sheet of dielectric material, in all probability it will not align with a similar defect in the other sheet or coating of the dielectric layer, thus preventing unwanted plating extending from one layer of circuitry to the underlying layer of circuitry.
    Type: Grant
    Filed: November 18, 1998
    Date of Patent: August 14, 2001
    Assignee: International Business Machines Corporation
    Inventors: Ashwinkumar C. Bhatt, John C. Camp, Mary Beth Fletcher, Kenneth Lynn Potter, John A. Welsh
  • Patent number: 6204453
    Abstract: A method of forming a printed circuit board or circuit card is provided with a metal layer which serves as a power plane sandwiched between a pair of photoimageable dielectric layers. Photoformed metal filled vias and photoformed plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials and connected to the vias and plated through holes. A border may be around the board or card including a metal layer terminating in from the edge of one of the dielectric layers. A copper foil is provided with clearance holes. First and second layers of photoimageable curable dielectric material is disposed on opposite sides of the copper which are photoimageable material. The patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. At the clearance holes in the copper, through holes are developed where holes were patterned in both dielectric layers.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: March 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Kenneth Fallon, Miguel A. Jimarez, Ross W. Keesler, John M. Lauffer, Roy H. Magnuson, Voya R. Markovich, Irv Memis, Jim P. Paoletti, Marybeth Perrino, John A. Welsh, William E. Wilson
  • Patent number: 6201194
    Abstract: A technique for forming an organic chip carrier or circuit board, having two voltage planes and at least two signal planes is provided which includes bonding a first layer of photolithographic dielectric material to a first metal layer and exposing the first layer of dielectric material to a pattern of radiation to provide at least one opening through the first layer of the dielectric material. A second metal layer is bonded to the first layer of photoimageable material on the opposite side from the first metal layer. Holes are etched in the first and second metal layers which correspond to and are larger than each of the patterns on said openings in the first layer of dielectric material. The exposed pattern on the first layer of dielectric material is then developed, with the openings in the first and second metal layers being larger than the corresponding developed opening in the first dielectric material.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: March 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: John M. Lauffer, Roy H. Magnuson, Voya R. Markovich, John A. Welsh
  • Patent number: 6099959
    Abstract: In accordance with the present invention, a method of treating the surface of an organic substrate, particularly a circuitized surface of an organic substrate, which method reduces the spread of adhesive resin that is subsequently deposited on the surface, is provided. This method comprises the steps of applying a treatment solution comprising a fatty acid compound, an alkalizing agent, and a solvent comprising water and from about 5% to about 90% by volume of an organic solvent selected from the group consisting of an alcohol, a glycol ether, and combinations thereof to the surface; and then removing substantially all of the solvent from the solution to provide a thin film on the surface of said substrate. The film comprises the fatty acids that were present in the treatment solution. In a preferred embodiment the treatment solution further comprises a chelating agent.
    Type: Grant
    Filed: July 1, 1998
    Date of Patent: August 8, 2000
    Assignee: International Business Machines Corporation
    Inventors: John Joseph Konrad, Konstantinos I. Papathomas, John A. Welsh
  • Patent number: 6009620
    Abstract: A method of making a circuitized substrate wherein fill material is forced into the substrate's holes to thus provide additional support for conductive circuitry or the like thereon, thus increasing the final product's circuit density. The fill is provided in a substantially uncured state, following which partial cure occurs. Thereafter, the fill is substantially fully cured and the aforementioned circuit elements may then be provided directly thereon. Alternatively, a dual fill process is used with both quantities of uncured fill being disposed in each hole and then cured by a singular UV exposure step.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: January 4, 2000
    Assignee: International Business Machines Corporation
    Inventors: Ashwinkumar C. Bhatt, Joseph A. Kotylo, Kenneth S. Lyjak, Amarjit S. Rai, John A. Welsh
  • Patent number: 5841470
    Abstract: Video signals are coded at a first relatively low frame rate. One or more portions of the image area, for example, the mouth of a person speaker: recognised by feature extractor, are coded at a higher frame rate. Preferably the second coding operates by resolving the pixel values of the image portion--considered as a vector--relative to a set or orthogonal reference vectors to produce coefficients which are then transmitted. Preferably, the feature extractor normalises the image portion as regards scaling, position and rotation and sends data on these parameters as side information.
    Type: Grant
    Filed: January 17, 1995
    Date of Patent: November 24, 1998
    Assignee: British Telecommunications public limited company
    Inventor: William John Welsh
  • Patent number: 5719951
    Abstract: A method of processing an image including the steps of: locating within the image the position of at least one predetermined feature; extracting from the image data representing each feature; and calculating for each feature a feature vector representing the position of the image data of the feature in an N-dimensional space, such space being defined by a plurality of reference vectors each of which is an eigenvector of a training set of like features in which the image data of each feature is modified to normalize the shape of each feature thereby to reduce its deviation from a predetermined standard shape of the feature, which step is carried out before calculating the corresponding feature vector.
    Type: Grant
    Filed: March 4, 1993
    Date of Patent: February 17, 1998
    Assignee: British Telecommunications public limited company
    Inventors: Mark Andrew Shackleton, William John Welsh
  • Patent number: 5114518
    Abstract: A multilayer circuit board having a conformal layer of an insulating material separating a circuit core from an adjacent insulating layer is disclosed. The conformal layer encapsulates the substrate and conductive pattern of circuit lines in the circuit core, thereby reducing failures caused by impurities trapped during lamination. The multilayer circuit board is manufactured by coating at least one circuit core with the conformal layer of insulating material before final lamination of the circuit cores into a multilayer circuit board.
    Type: Grant
    Filed: January 10, 1990
    Date of Patent: May 19, 1992
    Assignee: International Business Machines Corporation
    Inventors: Joseph G. Hoffarth, Donald J. Lazzarini, John A. Welsh, John P. Wiley
  • Patent number: 4971715
    Abstract: A stripping composition containing O-dichlorobenzene, dodecylbenzene sulfonic acid, perchloroethylene, and optionally an aromatic hydrocarbon containing at least 8 carbon atoms, and use thereof for removing photoresist.
    Type: Grant
    Filed: November 18, 1988
    Date of Patent: November 20, 1990
    Assignee: International Business Machines Corporation
    Inventors: Richard G. Armant, Edward L. Arrington, Anilkumar C. Bhatt, Donald M. Egleton, Frederick M. Ortloff, Joseph J. Sniezek, John A. Welsh
  • Patent number: 4918574
    Abstract: A multilayer circuit board having a conformal layer of an insulating material separating a circuit core from an adjacent insulating layer is disclosed. The conformal layer encapsulates the substrate and conductive pattern of circuit lines in the circuit core, thereby reducing failures caused by impurities trapped during lamination. The multilayer circuit board is manufactured by coating at least one circuit core with the conformal layer of insulating material before final lamination of the circuit cores into a multilayer circuit board.
    Type: Grant
    Filed: April 15, 1988
    Date of Patent: April 17, 1990
    Assignee: International Business Machines Corporation
    Inventors: Joseph G. Hoffarth, Donald J. Lazzarini, John A. Welsh, John P. Wiley