Patents by Inventor John Bruce Bowlerwell

John Bruce Bowlerwell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230247362
    Abstract: This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.
    Type: Application
    Filed: April 5, 2023
    Publication date: August 3, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Mark James MCCLOY-STEVENS, John Bruce BOWLERWELL, Yanto SURYONO, Xin ZHAO, Morgan Timothy PRIOR
  • Patent number: 11653150
    Abstract: This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: May 16, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Mark James McCloy-Stevens, John Bruce Bowlerwell, Yanto Suryono, Xin Zhao, Morgan Timothy Prior
  • Patent number: 11435412
    Abstract: This applications relates to methods and apparatus for monitoring a socket (101), to detect a connection status of a mating plug (102), e.g. for monitoring an audio jack socket for connection of an audio jack plug. A monitor (115, 305) is configured to monitor a voltage (VM) at a monitoring node (114), which is coupled to a jack detect contact (112) of the socket and a voltage pull-up element (113). The voltage (VM) at the monitoring node (114) is monitored against a threshold (Vthv) and a threshold module (302) is configured to vary the threshold depending on an indication of signal activity (SACT) of a signal path for a first socket contact (103) which will be electrically connected to the jack detect contact when a plug when inserted in the socket.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: September 6, 2022
    Assignee: Cirrus Logic, Inc.
    Inventor: John Bruce Bowlerwell
  • Patent number: 11362467
    Abstract: The present disclosure relates to circuitry for detecting at least partial removal of an audio accessory plug from a corresponding socket. The circuitry comprises a monitoring unit comprising a first terminal configured to be electrically connected to a first socket contact of the socket that is in electrical contact with a first plug contact of the plug when the plug is fully received in the socket. The monitoring unit is configured to monitor a first impedance of a first signal path coupled to the first terminal, and the circuitry is configured to output a signal indicative of detection of at least partial removal of the plug from the socket in response to detection by the monitoring unit of a first predetermined sequence of impedance states of the first signal path.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: June 14, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: John Bruce Bowlerwell, John Anthony Breslin
  • Publication number: 20220060832
    Abstract: This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.
    Type: Application
    Filed: November 2, 2021
    Publication date: February 24, 2022
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Mark James MCCLOY-STEVENS, John Bruce BOWLERWELL, Yanto SURYONO, Xin ZHAO, Morgan Timothy PRIOR
  • Patent number: 11206487
    Abstract: This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: December 21, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Mark James Mccloy-Stevens, John Bruce Bowlerwell, Yanto Suryono, Xin Zhao, Morgan Timothy Prior
  • Publication number: 20210167557
    Abstract: The present disclosure relates to circuitry for detecting at least partial removal of an audio accessory plug from a corresponding socket. The circuitry comprises a monitoring unit comprising a first terminal configured to be electrically connected to a first socket contact of the socket that is in electrical contact with a first plug contact of the plug when the plug is fully received in the socket. The monitoring unit is configured to monitor a first impedance of a first signal path coupled to the first terminal, and the circuitry is configured to output a signal indicative of detection of at least partial removal of the plug from the socket in response to detection by the monitoring unit of a first predetermined sequence of impedance states of the first signal path.
    Type: Application
    Filed: November 19, 2020
    Publication date: June 3, 2021
    Applicant: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
    Inventors: John Bruce BOWLERWELL, John Anthony BRESLIN
  • Publication number: 20200309865
    Abstract: This applications relates to methods and apparatus for monitoring a socket (101), to detect a connection status of a mating plug (102), e.g. for monitoring an audio jack socket for connection of an audio jack plug. A monitor (115, 305) is configured to monitor a voltage (VM) at a monitoring node (114), which is coupled to a jack detect contact (112) of the socket and a voltage pull-up element (113). The voltage (VM) at the monitoring node (114) is monitored against a threshold (Vthv) and a threshold module (302) is configured to vary the threshold depending on an indication of signal activity (SACT) of a signal path for a first socket contact (103) which will be electrically connected to the jack detect contact when a plug when inserted in the socket.
    Type: Application
    Filed: June 11, 2020
    Publication date: October 1, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Bruce BOWLERWELL
  • Patent number: 10725121
    Abstract: This applications relates to methods and apparatus for monitoring a socket (101), to detect a connection status of a mating plug (102), e.g. for monitoring an audio jack socket for connection of an audio jack plug. A monitor (115, 305) is configured to monitor a voltage (VM) at a monitoring node (114), which is coupled to a jack detect contact (112) of the socket and a voltage pull-up element (113). The voltage (VM) at the monitoring node (114) is monitored against a threshold (Vthv) and a threshold module (302) is configured to vary the threshold depending on an indication of signal activity (SACT) of a signal path for a first socket contact (103) which will be electrically connected to the jack detect contact when a plug when inserted in the socket.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: July 28, 2020
    Assignee: Cirrus Logic, Inc.
    Inventor: John Bruce Bowlerwell
  • Publication number: 20200186927
    Abstract: This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.
    Type: Application
    Filed: December 10, 2019
    Publication date: June 11, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Mark James MCCLOY-STEVENS, John Bruce BOWLERWELL, Yanto SURYONO, Xin ZHAO, Morgan Timothy PRIOR
  • Publication number: 20190128949
    Abstract: This applications relates to methods and apparatus for monitoring a socket (101), to detect a connection status of a mating plug (102), e.g. for monitoring an audio jack socket for connection of an audio jack plug. A monitor (115, 305) is configured to monitor a voltage (VM) at a monitoring node (114), which is coupled to a jack detect contact (112) of the socket and a voltage pull-up element (113). The voltage (VM) at the monitoring node (114) is monitored against a threshold (Vthv) and a threshold module (302) is configured to vary the threshold depending on an indication of signal activity (SACT) of a signal path for a first socket contact (103) which will be electrically connected to the jack detect contact when a plug when inserted in the socket.
    Type: Application
    Filed: October 18, 2018
    Publication date: May 2, 2019
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Bruce BOWLERWELL
  • Patent number: 10218535
    Abstract: A method of sending information between first and second modules connected by a signal bus comprises generating a clock signal in the first module, and imposing the clock signal on a first line of the bus. A first pattern of bit values is transmitted from the second module to the first module on a second line of the bus, during first half-periods of each period of said clock signal. A second pattern of bit values is transmitted from the first module to the second module on the second line of the bus, during second half-periods of each period of said clock signal, wherein the second half-periods of each period of said clock signal are different from the first half-periods of each period of said clock signal. Information can then be transmitted from the first module to the second module by altering the second pattern of bit values; and information can be transmitted from the second module to the first module by altering the first pattern of bit values.
    Type: Grant
    Filed: February 19, 2018
    Date of Patent: February 26, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Willem Zwart, John Bruce Bowlerwell, Michael Page, Alastair Boomer
  • Publication number: 20180176034
    Abstract: A method of sending information between first and second modules connected by a signal bus comprises generating a clock signal in the first module, and imposing the clock signal on a first line of the bus. A first pattern of bit values is transmitted from the second module to the first module on a second line of the bus, during first half-periods of each period of said clock signal. A second pattern of bit values is transmitted from the first module to the second module on the second line of the bus, during second half-periods of each period of said clock signal, wherein the second half-periods of each period of said clock signal are different from the first half-periods of each period of said clock signal. Information can then be transmitted from the first module to the second module by altering the second pattern of bit values; and information can be transmitted from the second module to the first module by altering the first pattern of bit values.
    Type: Application
    Filed: February 19, 2018
    Publication date: June 21, 2018
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Willem ZWART, John Bruce BOWLERWELL, Michael PAGE, Alastair BOOMER
  • Patent number: 9935786
    Abstract: A method of sending information between first and second modules connected by a signal bus comprises generating a clock signal in the first module, and imposing the clock signal on a first line of the bus. A first pattern of bit values is transmitted from the second module to the first module on a second line of the bus, during first half-periods of each period of said clock signal. A second pattern of bit values is transmitted from the first module to the second module on the second line of the bus, during second half-periods of each period of said clock signal, wherein the second half-periods of each period of said clock signal are different from the first half-periods of each period of said clock signal. Information can then be transmitted from the first module to the second module by altering the second pattern of bit values; and information can be transmitted from the second module to the first module by altering the first pattern of bit values.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: April 3, 2018
    Assignee: Cirrus Logic, Inc.
    Inventors: Willem Zwart, John Bruce Bowlerwell, Michael Page, Alastair Boomer
  • Publication number: 20160269193
    Abstract: A method of sending information between first and second modules connected by a signal bus comprises generating a clock signal in the first module, and imposing the clock signal on a first line of the bus. A first pattern of bit values is transmitted from the second module to the first module on a second line of the bus, during first half-periods of each period of said clock signal. A second pattern of bit values is transmitted from the first module to the second module on the second line of the bus, during second half-periods of each period of said clock signal, wherein the second half-periods of each period of said clock signal are different from the first half-periods of each period of said clock signal. Information can then be transmitted from the first module to the second module by altering the second pattern of bit values; and information can be transmitted from the second module to the first module by altering the first pattern of bit values.
    Type: Application
    Filed: March 7, 2016
    Publication date: September 15, 2016
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Willem ZWART, John Bruce BOWLERWELL, Michael PAGE, Alastair BOOMER
  • Patent number: 8750539
    Abstract: Charge pump circuits having circuit components such as transistors which may be damaged by voltage transients greater than the normal operating voltage levels of the charge pump circuit, such as may be experienced during powering down. The circuit components to be protected are connected in parallel with a leakage element arranged to have a leakage current that is small enough during normal operation to allow the charge pump to operate effectively but which is large enough, during development of a voltage transient, to prevent excess voltage levels being achieved. The leakage element may have a significant leakage current at a voltage less than the breakdown voltage of the circuit component. Suitable leakage elements are poly diodes.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: June 10, 2014
    Assignee: Wolfson Microelectronics plc
    Inventors: John Laurence Pennock, John Bruce Bowlerwell
  • Publication number: 20100166229
    Abstract: Charge pump circuits having circuit components such as transistors which may be damaged by voltage transients greater than the normal operating voltage levels of the charge pump circuit, such as may be experienced during powering down. The circuit components to be protected are connected in parallel with a leakage element arranged to have a leakage current that is small enough during normal operation to allow the charge pump to operate effectively but which is large enough, during development of a voltage transient, to prevent excess voltage levels being achieved. The leakage element may have a significant leakage current at a voltage less than the breakdown voltage of the circuit component. Suitable leakage elements are poly diodes.
    Type: Application
    Filed: December 30, 2009
    Publication date: July 1, 2010
    Inventors: John Laurence Pennock, John Bruce Bowlerwell