Abstract: The present disclosure relates to a method for adjusting a bias voltage of a SPAD photodiode, comprising successive steps of: applying to the photodiode a first test bias voltage lower than a normal bias voltage applied to the photodiode in a normal operating mode, subjecting the photodiode to photons, reading a first avalanche triggering signal of the photodiode, applying to the photodiode a second test bias voltage, different from the first test bias voltage, subjecting the photodiode to photons, reading a second avalanche triggering signal of the photodiode, increasing the normal bias voltage if the first and second signals indicate that the photodiode did not avalanche trigger, and reducing the normal bias voltage if the first and second signals indicate that the photodiode did avalanche trigger.

Abstract: A single-photon avalanche diode assembly, the diode including a central terminal and a peripheral terminal, the peripheral terminal being connected to an input of a comparator and to a first power supply terminal by a first resistor, the central terminal being connected by a conductive track to a second power supply terminal, a second resistor being arranged in series on said conductive track.

Abstract: The present disclosure relates to a method for adjusting a bias voltage of a SPAD photodiode, comprising successive steps of: applying to the photodiode a first test bias voltage lower than a normal bias voltage applied to the photodiode in a normal operating mode, subjecting the photodiode to photons, reading a first avalanche triggering signal of the photodiode, applying to the photodiode a second test bias voltage, different from the first test bias voltage, subjecting the photodiode to photons, reading a second avalanche triggering signal of the photodiode, increasing the normal bias voltage if the first and second signals indicate that the photodiode did not avalanche trigger, and reducing the normal bias voltage if the first and second signals indicate that the photodiode did avalanche trigger.

Abstract: An integrated circuit is made of a semiconductor material and comprises an input and/or terminal connected to an output transistor forming a parasitic element capable of triggering itself under the effect of an electrostatic discharge applied to the terminal. The integrated circuit comprises a protection device formed so as to be biased at the same time as the parasitic element under the effect of an electrostatic discharge, and more than the parasitic element to evacuate a discharge current as a priority.

Abstract: An integrated circuit is made of a semiconductor material and comprises an input and/or output terminal connected to an output transistor forming a parasitic element capable of triggering itself under the effect of an electrostatic discharge applied to the terminal. The integrated circuit comprises a protection device formed so as to be biased at the same time as the parasitic element under the effect of an electrostatic discharge, and more than the parasitic element to evacuate a discharge current as a priority.