Patents by Inventor John C. Eble, III
John C. Eble, III has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10404262Abstract: Methods and apparatuses featuring a multiplying injection-locked oscillator are described. Some embodiments include a pulse-generator-and-injector and one or more injection-locked oscillators. The outputs of the pulse-generator-and-injector can be injected into corresponding injection points of an injection-locked oscillator. In embodiments that include multiple injection-locked oscillators, the outputs of each injection-locked oscillator can be injected into the corresponding injection points of the next injection-locked oscillator. Some embodiments reduce deterministic jitter by dynamically modifying the loop length of an injection-locked oscillator, and/or by using a duty cycle corrector, and/or by multiplexing/blending the outputs from multiple delay elements of an injection-locked oscillator.Type: GrantFiled: December 23, 2016Date of Patent: September 3, 2019Assignee: Rambus Inc.Inventors: Jared L. Zerbe, Barry W. Daly, Dustin T. Dunwell, Anthony C. Carusone, John C. Eble, III
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Publication number: 20170207791Abstract: Methods and apparatuses featuring a multiplying injection-locked oscillator are described. Some embodiments include a pulse-generator-and-injector and one or more injection-locked oscillators. The outputs of the pulse-generator-and-injector can be injected into corresponding injection points of an injection-locked oscillator. In embodiments that include multiple injection-locked oscillators, the outputs of each injection-locked oscillator can be injected into the corresponding injection points of the next injection-locked oscillator. Some embodiments reduce deterministic jitter by dynamically modifying the loop length of an injection-locked oscillator, and/or by using a duty cycle corrector, and/or by multiplexing/blending the outputs from multiple delay elements of an injection-locked oscillator.Type: ApplicationFiled: December 23, 2016Publication date: July 20, 2017Applicant: Rambus Inc.Inventors: Jared L. Zerbe, Barry W. Daly, Dustin T. Dunwell, Anthony C. Carusone, John C. Eble, III
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Patent number: 9564911Abstract: Methods and apparatuses featuring a multiplying injection-locked oscillator are described. Some embodiments include a pulse-generator-and-injector and one or more injection-locked oscillators. The outputs of the pulse-generator-and-injector can be injected into corresponding injection points of an injection-locked oscillator. In embodiments that include multiple injection-locked oscillators, the outputs of each injection-locked oscillator can be injected into the corresponding injection points of the next injection-locked oscillator. Some embodiments reduce deterministic jitter by dynamically modifying the loop length of an injection-locked oscillator, and/or by using a duty cycle corrector, and/or by multiplexing/blending the outputs from multiple delay elements of an injection-locked oscillator.Type: GrantFiled: September 18, 2015Date of Patent: February 7, 2017Assignee: RAMBUS INC.Inventors: Jared L. Zerbe, Barry W. Daly, Dustin T. Dunwell, Anthony Chan Carusone, John C. Eble, III
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Patent number: 9479176Abstract: A camouflage circuit instantiated on a semiconductor substrate includes a transient-comparison circuit that briefly expresses a value representative of either a one or a zero in dependence upon reference elements that are visibly indistinct from a perspective normal to the planar surface substrate surface, but that nevertheless exhibit distinct electrical responses. Transient comparisons that define logic states only briefly vastly complicate the use of reverse-engineering tools and techniques that rely on optical stimulation to sense when transistors are on or off.Type: GrantFiled: November 25, 2014Date of Patent: October 25, 2016Assignee: Rambus Inc.Inventors: John C. Eble, III, Scott C. Best, Hanson Quan
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Publication number: 20160079993Abstract: Methods and apparatuses featuring a multiplying injection-locked oscillator are described. Some embodiments include a pulse-generator-and-injector and one or more injection-locked oscillators. The outputs of the pulse-generator-and-injector can be injected into corresponding injection points of an injection-locked oscillator. In embodiments that include multiple injection-locked oscillators, the outputs of each injection-locked oscillator can be injected into the corresponding injection points of the next injection-locked oscillator. Some embodiments reduce deterministic jitter by dynamically modifying the loop length of an injection-locked oscillator, and/or by using a duty cycle corrector, and/or by multiplexing/blending the outputs from multiple delay elements of an injection-locked oscillator.Type: ApplicationFiled: September 18, 2015Publication date: March 17, 2016Applicant: RAMBUS INC.Inventors: Jared L. Zerbe, Barry W. Daly, Dustin T. Dunwell, Anthony C. Carusone, John C. Eble, III
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Patent number: 9154145Abstract: Methods and apparatuses featuring a multiplying injection-locked oscillator are described. Some embodiments include a pulse-generator-and-injector and one or more injection-locked oscillators. The outputs of the pulse-generator-and-injector can be injected into corresponding injection points of an injection-locked oscillator. In embodiments that include multiple injection-locked oscillators, the outputs of each injection-locked oscillator can be injected into the corresponding injection points of the next injection-locked oscillator. Some embodiments reduce deterministic jitter by dynamically modifying the loop length of an injection-locked oscillator, and/or by using a duty cycle corrector, and/or by multiplexing/blending the outputs from multiple delay elements of an injection-locked oscillator.Type: GrantFiled: April 18, 2012Date of Patent: October 6, 2015Assignee: RAMBUS INC.Inventors: Jared L. Zerbe, Barry W. Daly, Dustin T. Dunwell, Anthony C. Carusone, John C. Eble, III
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Patent number: 8743973Abstract: A receiver circuit to receive signals from first and second pairs of transmission lines includes first and second interfaces, each with first and second input nodes to receive respective signals. The receiver circuit also includes a resistor network with first, second, third, and fourth resistive elements. The first and second resistive elements are each connected between the input nodes of a respective interface. The third and fourth resistive elements each include a pair of resistors connected in series between the input nodes of a respective interface, and an intermediate node between the resistors. The intermediate nodes are connected to an AC ground. The receiver circuit further includes a differential amplifier with first and second inputs coupled respectively to the first and second interfaces and an output to provide a signal derived from common mode components of the signals received at the input nodes.Type: GrantFiled: May 25, 2011Date of Patent: June 3, 2014Assignee: Rambus Inc.Inventors: Lei Luo, Brian S. Leibowitz, Jared L. Zerbe, Barry W. Daly, Wayne D. Dettloff, John C. Eble, III, John Wilson
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Publication number: 20140043105Abstract: Methods and apparatuses featuring a multiplying injection-locked oscillator are described. Some embodiments include a pulse-generator-and-injector and one or more injection-locked oscillators. The outputs of the pulse-generator-and-injector can be injected into corresponding injection points of an injection-locked oscillator. In embodiments that include multiple injection-locked oscillators, the outputs of each injection-locked oscillator can be injected into the corresponding injection points of the next injection-locked oscillator. Some embodiments reduce deterministic jitter by dynamically modifying the loop length of an injection-locked oscillator, and/or by using a duty cycle corrector, and/or by multiplexing/blending the outputs from multiple delay elements of an injection-locked oscillator.Type: ApplicationFiled: April 18, 2012Publication date: February 13, 2014Applicant: Rambus Inc.Inventors: Jared L. Zerbe, Barry W. Daly, Dustin T. Dunwell, Anthony C. Carusone, John C. Eble, III
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Publication number: 20110293041Abstract: A receiver circuit to receive signals from first and second pairs of transmission lines includes first and second interfaces, each with first and second input nodes to receive respective signals. The receiver circuit also includes a resistor network with first, second, third, and fourth resistive elements. The first and second resistive elements are each connected between the input nodes of a respective interface. The third and fourth resistive elements each include a pair of resistors connected in series between the input nodes of a respective interface, and an intermediate node between the resistors. The intermediate nodes are connected to an AC ground. The receiver circuit further includes a differential amplifier with first and second inputs coupled respectively to the first and second interfaces and an output to provide a signal derived from common mode components of the signals received at the input nodes.Type: ApplicationFiled: May 25, 2011Publication date: December 1, 2011Inventors: Lei Luo, Brian S. Leibowitz, Jared L. Zerbe, Barry W. Daly, Wayne D. Dettloff, John C. Eble, III, John Wilson
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Patent number: 8068357Abstract: A memory controller operates in two modes to support different types of memory devices. In a first mode, the memory controller distributes a dedicated reference voltage with each of a plurality of signal bundles to a corresponding plurality of memory devices. The reference voltages are conveyed using pads that are alternatively used for e.g. timing-reference signals in a second mode, so the provision for bundle-specific reference voltages need not increase the number of pads on the memory controller.Type: GrantFiled: September 4, 2008Date of Patent: November 29, 2011Assignee: Rambus Inc.Inventors: Frederick Ware, John Wilson, John C. Eble, III, Jade M. Kizer, Lei Luo, John W. Poulton, Ian Shaeffer
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Publication number: 20090059642Abstract: A memory controller operates in two modes to support different types of memory devices. In a first mode, the memory controller distributes a dedicated reference voltage with each of a plurality of signal bundles to a corresponding plurality of memory devices. The reference voltages are conveyed using pads that are alternatively used for e.g. timing-reference signals in a second mode, so the provision for bundle-specific reference voltages need not increase the number of pads on the memory controller.Type: ApplicationFiled: September 4, 2008Publication date: March 5, 2009Applicant: Rambus Inc.Inventors: Frederick Ware, John Wilson, John C. Eble, III, Jade M. Kizer, Lei Luo, John W. Poulton, Ian Shaeffer