Patents by Inventor John C. Ehmke

John C. Ehmke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020036304
    Abstract: A switch includes a conductive region, a membrane, and a dielectric region. The dielectric region is formed from a dielectric material and is disposed between the membrane and the conductive region. When a sufficient voltage is applied between the conductive region and the membrane, a capacitive coupling between the membrane and the conductive region is effected. The dielectric material has a resistivity sufficiently low to inhibit charge accumulation in the dielectric region during operation of the switch.
    Type: Application
    Filed: December 4, 2001
    Publication date: March 28, 2002
    Applicant: Raytheon Company, a Delaware corporation
    Inventors: John C. Ehmke, Charles L. Goldsmith, Zhimin J. Yao, Susan M. Eshelman
  • Patent number: 6359290
    Abstract: A method of making a diode and the diode wherein there is provided a substrate of p-type group II-VI semiconductor material and an electrically conductive material capable of forming an ohmic contact with the substrate is forced into the lattice of the substrate to create an n-type region in the substrate in contact with the material and forming an electrical contact to the p-type region of said substrate. The substrate is preferably HgCdTe and the electrically conductive material is preferably tungsten or tin coated tungsten or tungsten coated with a mercury amalgam.
    Type: Grant
    Filed: February 6, 1996
    Date of Patent: March 19, 2002
    Assignee: Raytheon Company
    Inventor: John C. Ehmke
  • Patent number: 6147582
    Abstract: A method of forming a three-dimensional micro-coil on a substrate (10) is provided which consists of forming a first metal layer (14) on the substrate (10). The first metal layer (14) is partitioned into a first plurality of metal strips (16). A sacrificial layer (18) is formed on the first plurality of metal strips (16). A second metal layer (24) is formed on the sacrificial layer (18). The second metal layer (24) is then partitioned into a second plurality of metal strips (26) such that a continuous loop of metal is formed between the first plurality of metal strips (16) and the second plurality of metal strips (26). This continuous loop of metal defines windings for a three-dimensional micro-coil (28) with one side in contact with the substrate (10).
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: November 14, 2000
    Assignee: Raytheon Company
    Inventors: Charles L. Goldsmith, Andrew Malczewski, John C. Ehmke, Zhimin Yao
  • Patent number: 5834775
    Abstract: A method of fabricating a focal plane array and the array having a integral slot shield which comprises fabricating a focal plane array having a plurality of detector elements. A layer of electrically insulating material having a planar top surface is then formed over the array. A reflective layer is then formed over the layer of electrically insulating material and the electrically insulating layer and reflective layer are etched only in the regions thereof over the detector elements to form slots over the detector elements. An absorbing layer is formed over the reflective layer. The absorbing layer is preferably an infrared-transparent dielectric having an optical thickness of about one quarter wavelength of the light frequency of interest with a metallic flash layer thereover having a thickness of from about 50 to about 60 Angstroms. The infrared dielectric is preferably one of zinc sulfide, zinc selenide, polyethylene and paraxylilene.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: November 10, 1998
    Assignee: Raytheon TI Systems, Inc.
    Inventors: Mark R. Skokan, John C. Ehmke, Charles A. Franda, Stephen L. Whicker
  • Patent number: 5536680
    Abstract: A method of making a diode and the diode wherein there is provided a substrate of p-type group II-VI semiconductor material and an electrically conductive material capable of forming an ohmic contact with the substrate is forced into the lattice of the substrate to create an n-type region in the substrate in contact with the material and forming an electrical contact to the p-type region of said substrate. The substrate is preferably HgCdTe and the electrically conductive material is preferably tungsten or tin coated tungsten or tungsten coated with a mercury amalgam.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: July 16, 1996
    Assignee: Texas Instruments Incorporated
    Inventor: John C. Ehmke
  • Patent number: 5298733
    Abstract: A method of fabricating a focal plane array having an integral slot shield which comprises fabricating a focal plane array having a plurality of detector elements. A layer of electrically insulating material, preferably a spun on epoxy, having a planar top surface is then formed over the array. A reflective layer is then formed over the layer of electrically insulating material and the electrically insulating layer and reflective layer are etched only in the regions thereof over the detector elements to form slots over said detector elements. The electrically insulating layer is etched with a directional etchant. The etched layer of electrically insulating material defines side walls in the slots, material from the side walls being removed to define non-planar sidewalls. The non-planar side walls preferably have an essentially sawtooth shape.
    Type: Grant
    Filed: December 10, 1992
    Date of Patent: March 29, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: John C. Ehmke, James C. Baker