Abstract: Applications may request persistent storage in nonvolatile memory. The persistent storage is maintained across power events and application instantiations. Persistent storage may be maintained by systems with or without memory management units.

Abstract: A nonvolatile memory device generates a signature using a private key and contents within the memory device. The signature is stored in a secure area within the nonvolatile memory device. A processor having the same private key also generates a signature that is stored in the clear. The processor validates the contents of the nonvolatile memory by comparing the signatures.

Abstract: A FLASH translation layer (FTL) includes a translation table that is maintained in non-FLASH memory. The translation table maps logical addresses to physical addresses and may be maintained in phase change memory (PCM). A bad block table (BBT) may also be maintained in non-FLASH memory.

Abstract: A processor-based device (e.g., a wireless device) may include a processor and a semiconductor nonvolatile memory to directly execute an application (e.g., an execute-in-place application) using an associated database. Within a flash memory, in one embodiment, an executable program may be separately stored in a non-fragmented manner from a resident database that includes program management information for use in an execution that does not involve a random access memory, saving time and resources.

Abstract: Storing an application onto a system includes receiving the application, determining specifications of the system, and reorganizing the application in accordance with the specifications of the system so as to improve execution of the application. The reorganized application is stored on the system.

Abstract: Provided are a method and device for logging changes to blocks in a non-volatile memory. Security bits are maintained for blocks of cells in a non-volatile memory device indicating whether data in the blocks has been modified. The security bit for one block is set to indicate modification in response to detecting that at least one cell in the block was modified.

Abstract: A memory profiling system profiles memory objects in various memory devices and identifies memory objects as candidates to be moved to a more efficient memory device. Memory object profiles include historical read frequency, write frequency, and execution frequency. The memory object profile is compared to parameters describing read and write performance of memory types to determine candidate memory types for relocating memory objects. Memory objects with high execution frequency may be given preference when relocating to higher performance memory devices.

Abstract: Methods and systems provide memory handling for memory systems with mixed volatile and nonvolatile memory types. In various embodiments, the method or system maintains a page table that marks memory pages in nonvolatile memory as write-protected. When a write is attempted to a write-protected page in nonvolatile memory, a fault is generated. In response to the fault, memory contents of the write-protected nonvolatile page are moved to a page location in a volatile memory.

Abstract: Provided are a method, device, and system for booting from a memory device having an array of blocks of cells. An initial memory map has a mapping of memory addresses to accessible blocks of cells in the memory device that are accessible following a boot sequence. There are secure blocks of cells in addition to the accessible blocks of cells that are not accessible through the memory addresses in the initial memory map. In response to detecting an initialization event, the secure blocks of cells are mapped to a range of memory addresses in the memory map to generate an altered memory map. Code is executed in the secure blocks using the range of memory addresses in the altered memory map. The range of memory addresses mapping to the secure blocks are remapped to map to the accessible blocks to which the range of memory addresses mapped in the initial memory map to restore the initial memory map from the altered memory map.

Abstract: A flash memory based processing apparatus including, among other things, an integrated controller to authenticate various operations, such as read, write, patch, and key operations, and directly control read access to partitions of the memory array of the flash device via operations in various read access modes. Other embodiments may be described and claimed herein.

Abstract: A program different than an operation system may be utilized to partially update an original image of system code. In one embodiment, operating system code may be adaptively stored and updated within a non-volatile storage device across at least two different memories into at least two code objects based on the relative utilization of the system code in the two code objects. Operating system patching or application and driver updates may be provided without re-writing an entire image of operating system code in some embodiments. The tuning of operating system code storage may be implemented based on a usage pattern of the operating system code on a device in some cases.

Abstract: A method and apparatus is described herein for compressing a binary image in memory and decompressing a portion memory in response to a request, without using a compression index table to find relocated compressed code. A binary image is traversed in windows. Each selected window is compressed to form compressed windows having a compressed portion and an available memory portion. Static data is backfilled in available memory portions to achieve efficient compression. Upon receiving a request to a specific physical address, the compressed portion of that physical location is decompressed and provided for execution without using a compression index table, as the compressed code portion was not relocated from its original physical location.

Abstract: A scheme for securing a memory subsystem or stack is disclosed. A first memory device performs an authentication on a received operation. If the authentication is valid, a write protect signal to a second memory device is disabled, allowing write or erase operations to be performed on the second memory device.

Abstract: A wireless device includes a nonvolatile memory that handles the task of securely performing integrity checks that do not expose the authentication private key externally. The system security architecture installs and associates private keys with the nonvolatile memory to create a secure execution environment resistant to virus attack. The nonvolatile memory provides integrity checks of nonvolatile memory data and generates signatures for data provided by the memory.

Abstract: A remapping circuit is connected to a memory. A configuration register is connected to the memory. The configuration register includes performance information for memory blocks in the memory. Also, a system includes a processor, a memory management device is connected to the processor, a display is connected to the processor, a non-volatile memory including a memory blocks is connected to the memory management device, and a register is connected to the non-volatile memory. The memory management device to re-map the non-volatile memory based on information stored in the register.

Abstract: An apparatus, system, method, and article for protecting nonvolatile memory from viruses are described. The apparatus may include a nonvolatile memory comprising one or more protected storage areas. The nonvolatile memory may be arranged to transform buffered information to be programmed in the protected areas and to program transformed information in the protected storage areas. Other embodiments are described and claimed.

Abstract: A code object and flash memory may be updated by storing a new code object in the flash memory. Then, a pointer from a page table may be redirected to point to the new code object. The old code object may then be deleted. As a result, code can be updated without the need for rebooting by using the memory management unit and its page table capability.

Abstract: Firmware updates are performed in a digital device that includes a secure flash that secures each block of stored data with a digital signature. In at least one embodiment, the update package that is received by the digital device for use in performing the update includes the digital signatures of blocks to be updated in the flash. In other embodiments, the digital signatures are generated within the digital device after an update package has been received.

Abstract: In some embodiments, systems and methods for sequencing multiple write state machines may comprise a pulse generator, a delay circuit, and a stacked memory array, wherein each memory array in the stacked memory array have an individual write state machine. In an exemplary embodiment, the pulse generator may be operable to supply pulses of current to the write state machines so that the system's voltage regulator may accommodate the total aggregated current in the system. In some exemplary embodiments, pulses of current may be applied to the first write machine, and delayed pulses of current may be applied to the second write state machine.

Abstract: A technique for coalesced Power Loss Recovery PLR status bits in an Error Correction Code ECC enabled flash memory.