Patents by Inventor John Daniel Wallner

John Daniel Wallner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6542507
    Abstract: The present invention, generally speaking, uses input buffering and output control to provide a high-speed, high-performance digital traffic switch. This approach solves all of the problems noted above with respect to the prior art (input buffering/input control, output buffering/output control). Dropped discrete information units (cells) are dropped at the input port, and so will not be transmitted across the switch fabric. This reduces the traffic load on the switch fabric during congested periods, and makes the switch fabric easier to design and expand. Input buffering/output control allows for the use of smaller buffers than output buffered/output control architectures for the same level of “discrete information unit (cell) drop” performance, and scales well to larger systems. Input buffering/output control provides all the information necessary to the output (data flow) controller necessary to implement very precise control algorithms.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: April 1, 2003
    Assignee: Alcatel
    Inventors: Todd L. Khacherian, Michael Jon Nishimura, Michael Kenneth Wilson, John Daniel Wallner, Christopher Leo Hoogenboom, John W. Bailey
  • Patent number: 5768257
    Abstract: The present invention, generally speaking, uses input buffering and output control to provide a high-speed, high-performance digital traffic switch. Dropped discrete information units (cells) are dropped at the input port, and so will not be transmitted across the switch fabric. This reduces the traffic load on the switch fabric during congested periods, and makes the switch fabric easier to design and expand. Input buffering/output control allows for the use of smaller buffers than output buffered/output control architectures for the same level of "discrete information unit (cell) drop" performance, and scales well to larger systems. Input buffering/output control provides all the information necessary to the output (data flow) controller necessary to implement very precise control algorithms. These algorithms can then administer switch fabric admission polices and contract enforcement fairly across all input ports.
    Type: Grant
    Filed: July 11, 1996
    Date of Patent: June 16, 1998
    Assignee: Xylan Corporation
    Inventors: Todd L. Khacherian, Michael Jon Nishimura, Michael Kenneth Wilson, John Daniel Wallner, Christopher Leo Hoogenboom, John W. Bailey