Abstract: In embodiments of the present invention improved capabilities are described for a human resource management platform that includes applications targeted to solve a variety of human resource, compensation, and performance management problems. Applications of the human resource management platform include business applications such as performance driven compensation that may provide a single solution for driving employee performance and organizational success by automation of goal setting, performance measurement, and employee rewards by directly linking performance results to rewards.

Abstract: In embodiments of the present invention improved capabilities are described for a human resource management platform that includes applications targeted to solve a variety of human resource, compensation, and performance management problems. Applications of the human resource management platform include business applications such as performance driven compensation that may provide a single solution for driving employee performance and organizational success by automation of goal setting, performance measurement, and employee rewards by directly linking performance results to rewards.

Abstract: A method that optimizes system performance using performance monitors is presented. The method gathers thread performance data using performance monitors for threads running on either a first ISA processor or a second ISA processor. Multiple first processors and multiple second processors may be included in a single computer system. The first processors and second processors can each access data stored in a common shared memory. The gathered thread performance data is analyzed to determine whether the corresponding thread needs additional CPU time in order to optimize system performance. If additional CPU time is needed, the amount of CPU time that the thread receives is altered (increased) so that the thread receives the additional time when it is scheduled by the scheduler. In one embodiment, the increased CPU time is accomplished by altering a priority value that corresponds to the thread.

Abstract: In embodiments of the present invention improved capabilities are described for a human resource management platform that includes applications targeted to solve a variety of human resource, compensation, and performance management problems. Applications of the human resource management platform include business applications such as performance driven compensation that may provide a single solution for driving employee performance and organizational success by automation of goal setting, performance measurement, and employee rewards by directly linking performance results to rewards.

Abstract: In embodiments of the present invention improved capabilities are described for a human resource management platform that includes applications targeted to solve a variety of human resource, compensation, and performance management problems. Applications of the human resource management platform include business applications such as performance driven compensation that may provide a single solution for driving employee performance and organizational success by automation of goal setting, performance measurement, and employee rewards by directly linking performance results to rewards.

Abstract: In embodiments of the present invention improved capabilities are described for a human resource management platform that includes applications targeted to solve a variety of human resource, compensation, and performance management problems. Applications of the human resource management platform include business applications such as performance driven compensation that may provide a single solution for driving employee performance and organizational success by automation of goal setting, performance measurement, and employee rewards by directly linking performance results to rewards.

Abstract: An approach of analyzing software performance without requiring hardware is presented. A timing description generator logs instruction performance characteristics for each of the assembly code's instructions. The performance characteristics identify whether an instruction issued or stalled during particular instruction cycles. Once the timing description generator cycles through the instructions and logs performance characteristics for each instruction, the timing description generator generates a performance graph. For each page line, the performance graph includes 1) dual-issue information if applicable, 2) instruction cycle counter values/stalled instruction identifier's that are positioned at corresponding line location values, and 3) the instruction. A developer may analyze the performance graph and identify code locations that require optimization in order to increase performance.

Abstract: In embodiments of the present invention improved capabilities are described for a human resource management platform that includes applications targeted to solve a variety of human resource, compensation, and performance management problems. Applications of the human resource management platform include business applications such as performance driven compensation that may provide a single solution for driving employee performance and organizational success by automation of goal setting, performance measurement, and employee rewards by directly linking performance results to rewards.

Abstract: A system and method is provided to simulate hardware interrupts by inserting instructions into a stream of instructions where a “no operation” (or NOOP) instruction would normally be inserted. The instruction is inserted is a conditional branch instruction, called a BISLED, that branches if there is external data in a known memory area. In one embodiment, the processor has at least two pipelines that need to be aligned so that certain instructions are scheduled for the first pipeline and other instructions are scheduled for the other. In this embodiment, the BISLED also serves the purpose of re-aligning the instruction stream so that instructions are placed in the correct pipeline based upon the function performed by the instruction.

Abstract: An approach of analyzing software performance without requiring hardware is presented. A timing description generator logs instruction performance characteristics for each of the assembly code's instructions. The performance characteristics identify whether an instruction issued or stalled during particular instruction cycles. Once the timing description generator cycles through the instructions and logs performance characteristics for each instruction, the timing description generator generates a performance graph. For each page line, the performance graph includes 1) dual-issue information if applicable, 2) instruction cycle counter values/stalled instruction identifier's that are positioned at corresponding line location values, and 3) the instruction. A developer may analyze the performance graph and identify code locations that require optimization in order to increase performance.

Abstract: An approach that optimizes system performance using performance monitors is presented. The system gathers thread performance data using performance monitors for threads running on either a first ISA processor or a second ISA processor. Multiple first processors and multiple second processors may be included in a single computer system. The first processors and second processors can each access data stored in a common shared memory. The gathered thread performance data is analyzed to determine whether the corresponding thread needs additional CPU time in order to optimize system performance. If additional CPU time is needed, the amount of CPU time that the thread receives is altered (increased) so that the thread receives the additional time when it is scheduled by the scheduler. In one embodiment, the increased CPU time is accomplished by altering a priority value that corresponds to the thread.

Abstract: A system, method, and program product that optimizes system performance using performance monitors is presented. The system gathers thread performance data using performance monitors for threads running on either a first ISA processor or a second ISA processor. Multiple first processors and multiple second processors may be included in a single computer system. The first processors and second processors can each access data stored in a common shared memory. The gathered thread performance data is analyzed to determine whether the corresponding thread needs additional CPU time in order to optimize system performance. If additional CPU time is needed, the amount of CPU time that the thread receives is altered (increased) so that the thread receives the additional time when it is scheduled by the scheduler. In one embodiment, the increased CPU time is accomplished by altering a priority value that corresponds to the thread.

Abstract: A system and method is provided to simulate hardware interrupts by inserting instructions into a stream of instructions where a “no operation” (or NOOP) instruction would normally be inserted. The instruction is inserted is a conditional branch instruction, called a BISLED, that branches if there is external data in a known memory area. In one embodiment, the processor has at least two pipelines that need to be aligned so that certain instructions are scheduled for the first pipeline and other instructions are scheduled for the other. In this embodiment, the BISLED also serves the purpose of re-aligning the instruction stream so that instructions are placed in the correct pipeline based upon the function performed by the instruction.