Abstract: Methods and systems of performing feed forward equalization (FFE) on data streams are described. A circuitry may generate staggered data streams from data streams of an input signal. The staggered data streams may include data in staggered unit intervals. The circuitry may include a plurality of segments. A segment may define a specific unit interval to carve the staggered data streams into one unit interval pulses positioned at the specific unit interval. The specific unit interval to carve the staggered data streams may indicate an assignment of the segment as one of a FFE pre tap, a FFE main tap, and a FFE post tap. The plurality of segments may be assigned to different FFE taps based on different clock signal selection defining different unit intervals to perform the carving. The plurality of segments may output respective one unit interval pulses to reproduce the input signal.

Abstract: Variable gain amplifiers and methods of designing the same include a first amplifying transistor configured to receive a first input signal and to provide a first amplified output signal based on the first input signal. A phase compensating resistor is connected to the first amplifying transistor and has a resistance calibrated as: R e = ? b C be , par where ?b is the base transit time of the first amplifying transistor and Cbe,par is the gain-independent part of the base-emitter capacitance of the first amplifying transistor.

Abstract: Methods and systems for phased array tapering include setting a gain at a phase-invariant variable gain amplifier in each of a set of front-ends of a phased array transceiver, to perform tapering of beam pattern side lobes. Setting the gain includes setting a first gain at a first stage of the phase-invariant variable gain amplifier and setting a second gain at a second stage of the phase-invariant variable gain amplifier. A dependency of a phase shift of the first stage on the gain of the first stage is equal to and opposite a dependency of a phase shift of the second stage on the gain of the second stage.

Abstract: Methods and systems of performing feed forward equalization (FFE) on data streams are described. A circuitry may generate staggered data streams from data streams of an input signal. The staggered data streams may include data in staggered unit intervals. The circuitry may include a plurality of segments. A segment may define a specific unit interval to carve the staggered data streams into one unit interval pulses positioned at the specific unit interval. The specific unit interval to carve the staggered data streams may indicate an assignment of the segment as one of a FFE pre tap, a FFE main tap, and a FFE post tap. The plurality of segments may be assigned to different FFE taps based on different clock signal selection defining different unit intervals to perform the carving. The plurality of segments may output respective one unit interval pulses to reproduce the input signal.

Abstract: Methods and systems for phased array tapering include setting a gain at a phase-invariant variable gain amplifier in each of a set of front-ends of a phased array transceiver, to perform tapering of beam pattern side lobes. Setting the gain includes setting a first gain at a first stage of the phase-invariant variable gain amplifier and setting a second gain at a second stage of the phase-invariant variable gain amplifier. A dependency of a phase shift of the first stage on the gain of the first stage is equal to and opposite a dependency of a phase shift of the second stage on the gain of the second stage.

Abstract: A method for phased array tapering includes setting a gain at a phase-invariant variable gain amplifier in each of a plurality of front-ends of a phased array transceiver to perform tapering of beam pattern side lobes. A resistance in the phase-invariant variable gain amplifier is set to provide a phase shift that is independent of gain.

Abstract: A distributed voltage regulator includes multiple micro-regulators disposed in a corresponding set of circuit sectors of an integrated circuit. Each micro-regulator provides current to the corresponding circuit sector at a current injection point. The regulator also includes a control module configured to receive feedback signals corresponding to a one or more sense points within each circuit sector and provide a control signal to each micro-regulator. The control module limits load-sharing imbalance within the plurality of micro-regulators. A voltage regulator with multiple sense points includes a micro-regulator that provides current at a current injection point, and a control module that receives feedback signals corresponding to a plurality of sense points and provides a control signal to the micro-regulator. The micro-regulator may comprise a charge pump that provides a local reference voltage that enables the micro-regulator to suppress local voltage drooping during feedback transitions (e.g.

Abstract: Variable gain amplifiers and methods of designing the same include a first amplifying transistor configured to receive a first input signal and to provide a first amplified output signal based on the first input signal. A phase compensating resistor is connected to the first amplifying transistor and has a resistance calibrated as: R e = ? b C be , par where ?b is the base transit time of the first amplifying transistor and Cbe,par is the gain-independent part of the base-emitter capacitance of the first amplifying transistor.

Abstract: An apparatus for providing a local reference voltage for a voltage regulator includes a reference capacitor configured to provide the local reference voltage, a charge pump configured to push current to, or pull current from, the reference capacitor according to one or more control inputs received by the charge pump, and a boosting circuit configured to add or subtract a discrete quantity of charge to the reference capacitor according to one or more boosting control signals. A boosting control circuit may be configured to disconnect a boosting capacitor from the reference capacitor during a first phase of a control cycle and connect the boosting capacitor to the reference capacitor during a second phase of the control cycle. The boosting capacitor may be pre-charged (to add charge) or discharged (to subtract charge) during the first phase of the control cycle. A corresponding method is also disclosed herein.

Abstract: Variable gain amplifiers and methods of designing the same include a first amplifying transistor configured to receive a first input signal and to provide a first amplified output signal based on the first input signal. A phase compensating resistor is connected to the first amplifying transistor and has a resistance that compensates for a phase dependence of the first amplifying transistor, such that an output phase of the amplified output signal is dependent only on a phase of the input signal and is independent of an amplification of the first amplifying transistor.

Abstract: An apparatus for providing a local reference voltage for a voltage regulator includes a reference capacitor configured to provide the local reference voltage, a charge pump configured to push current to, or pull current from, the reference capacitor according to one or more control inputs received by the charge pump, and a boosting circuit configured to add or subtract a discrete quantity of charge to the reference capacitor according to one or more boosting control signals. A boosting control circuit may be configured to disconnect a boosting capacitor from the reference capacitor during a first phase of a control cycle and connect the boosting capacitor to the reference capacitor during a second phase of the control cycle. The boosting capacitor may be pre-charged (to add charge) or discharged (to subtract charge) during the first phase of the control cycle. A corresponding method is also disclosed herein.

Abstract: A distributed voltage regulator includes multiple micro-regulators disposed in a corresponding set of circuit sectors of an integrated circuit. Each micro-regulator provides current to the corresponding circuit sector at a current injection point. The regulator also includes a control module configured to receive feedback signals corresponding to a one or more sense points within each circuit sector and provide a control signal to each micro-regulator. The control module limits load-sharing imbalance within the plurality of micro-regulators. A voltage regulator with multiple sense points includes a micro-regulator that provides current at a current injection point, and a control module that receives feedback signals corresponding to a plurality of sense points and provides a control signal to the micro-regulator. The micro-regulator may comprise a charge pump that provides a local reference voltage that enables the micro-regulator to suppress local voltage drooping during feedback transitions (e.g.

Abstract: A 1/n-rate decision feedback equalizer (DFE) and method include a plurality of branches. Each branch includes a summer circuit configured to add a feedback signal to a received input, and a latch configured to receive an output of the summer circuit in accordance with a clock signal. A feedback circuit includes a multiplexer configured to receive as input, an output of each branch, the multiplexer having a clocked select input and configured to multiplex the output of each branch to assemble a full rate bit sequence, and a filter configured to provide cancellation of intersymbol interference (ISI) from the received input to be provided to the summer circuit of each branch.

Abstract: A probabilistic digitizer for extracting information from a Josephson comparator is disclosed. The digitizer uses statistical methods to aggregate over a set of comparator readouts, effectively increasing the sensitivity of the comparator even when an input signal falls within the comparator's gray zone. Among other uses, such a digitizer may be used to discriminate between states of a qubit.

Abstract: A method for phased array tapering includes setting a gain at a phase-invariant variable gain amplifier in each of a plurality of front-ends of a phased array transceiver to perform tapering of beam pattern side lobes. A resistance in the phase-invariant variable gain amplifier is set to provide a phase shift that is independent of gain.

Abstract: Variable gain amplifiers and methods of designing the same include a first amplifying transistor configured to receive a first input signal and to provide a first amplified output signal based on the first input signal. A phase compensating resistor is connected to the first amplifying transistor and has a resistance that compensates for a phase dependence of the first amplifying transistor, such that an output phase of the amplified output signal is dependent only on a phase of the input signal and is independent of an amplification of the first amplifying transistor.

Abstract: A probabilistic digitizer for extracting information from a Josephson comparator is disclosed. The digitizer uses statistical methods to aggregate over a set of comparator readouts, effectively increasing the sensitivity of the comparator even when an input signal falls within the comparator's gray zone. Among other uses, such a digitizer may be used to discriminate between states of a qubit.

Abstract: A probabilistic digitizer for extracting information from a Josephson comparator is disclosed. The digitizer uses statistical methods to aggregate over a set of comparator readouts, effectively increasing the sensitivity of the comparator even when an input signal falls within the comparator's gray zone. Among other uses, such a digitizer may be used to discriminate between states of a qubit.

Abstract: Systems and methods are provided to regulate a supply voltage of a load circuit. For example, a system includes a voltage regulator circuit that includes a passgate device. The system includes a passgate strength calibration control module which is configured to (i) obtain information which specifies operating conditions of the voltage regulator circuit, (ii) access entries of one or more look-up tables using the obtained information, (iii) use information within the accessed entries to determine a maximum load current that could be demanded by the load circuit under the operating conditions specified by the obtained information, and to predict a passgate device width which is sufficient to supply the determined maximum load current, and (iv) set an active width of the passgate device according to the predicted passgate device width.

Abstract: Methods and systems for controlling variable gain amplifiers include setting a phase at a phase shifter in each of multiple of front-ends of a phased array transceiver, accounting for a constant phase shift of a phase-invariant variable gain amplifier. A gain is set at the phase-invariant variable gain amplifier in each of the multiple front-ends to perform tapering of beam pattern side lobes. A resistance in the phase-invariant variable gain amplifier is set to provide a phase shift that is independent of gain.