Abstract: A network capacity management system and method are disclosed. In one form, a capacity management system for use with an optical network includes a network capacity management engine operable to actively access a network element. The system further includes a network-based application interface associated with the network capacity management engine. The application may facilitate providing information associated with a network element to a user in near real-time.

Abstract: An electronic digital crossconnect system electronically interconnecting individual subscriber channels between various higher rate digital facilities. The system provides for a simplified, lower-speed information bus structure, improved reliability, and the ability to connect intact a high rate digital facility without super frame alignment.

Abstract: A digital clock recovery circuit is described which extracts the signal element timing from a return-to-zero data stream. A converter changes the bipolar digital data stream to at least one first return-to-zero data stream representing pulses in the bipolar digital data stream. In these streams, a logic one is typically represented by a pulse of undetermined width less than the bit period. A logic zero is typically represented by no pulse. A reference clock signal having a predetermined frequency is required by the circuitry. An edge detector detects the positive going edges of the pulses in the combined return-to-zero data stream, and generates load pulses to a counter which are synchronized to transitions of the reference clock signal. The counter receives the load pulses and utilizes reference clock signal to produce a recovered clock signal, skiping or repeating counter states to kepp the recovered clock signal aligned with the bipolar digital data stream.

Abstract: A high-frequency negative resistance circuit for use in a voltage controlled crystal oscillator has a pair of input terminals thereby defining an input current and input voltage. The high-frequency negative resistance circuit includes a sensing circuit for sensing the input current, a biasing voltage source and a load impedance connected to the voltage source. The high-frequency negative resistance circuit further comprises a current mirror circuit connected to the sensing circuit and to the load impedance for producing a current in the load impedance. The current in the load impedance is approximately equal to the input current. The current mirror circuit also controls the sensing circuit to cause the input voltage to decrease as the input current increases. Decreasing input voltage with increasing input current defines the negative resistance. When this negative resistance circuit is configured with a crystal and a voltage controlled capacitance, an oscillator capable of high-frequency operation results.