Patents by Inventor John K. Buchanan

John K. Buchanan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 3987418
    Abstract: The chip architecture of an MOS microprocessor chip includes data bus input-output buffer circuitry located along the lower right hand edge of the chip. High order address buffer output circuitry is located along the bottom of the chip. Directly to the left of the data bus input-output buffer circuitry is the arithmetic logic unit circuitry, and to the right of this and adjacent to the high order address bit buffer circuitry is located a register section including first accumulator register, a second accumulator register, high and low order index registers, a high order incrementer and an associated program counter, a low order incrementer and associated program counter, a high order stack pointer register and a low order stack pointer register, and a temporary register arranged on the surface of the microprocessor chip in a particular sequence. To the left of the register section and along the lower left hand edge of the chip is located a plurality of low order address bit buffer circuits.
    Type: Grant
    Filed: October 30, 1974
    Date of Patent: October 19, 1976
    Assignee: Motorola, Inc.
    Inventor: John K. Buchanan
  • Patent number: 3976892
    Abstract: An integrated circuit includes circuitry thereon which includes a sensor circuit which detects a change in one of the plurality of inputs to the integrated circuit and generates one or more pre-conditioning signals which control circuitry to set up voltage at various nodes in the integrated circuit to facilitate fast processing of data signals from inputs of the integrated circuit to outputs thereof. Embodiments of the sensor circuit include integrated memory circuits and integrated micro-processor circuits.
    Type: Grant
    Filed: February 7, 1975
    Date of Patent: August 24, 1976
    Assignee: Motorola, Inc.
    Inventor: John K. Buchanan
  • Patent number: 3942162
    Abstract: An integrated circuit includes circuitry thereon which includes a sensor circuit which detects a change in one of the plurality of inputs to the integrated circuit and generates one or more pre-conditioning signals which control circuitry to set up voltages at various nodes in the integrated circuit to facilitate fast processing of data signals from inputs of the integrated circuit to outputs thereof. Embodiments of the sensor circuit include integrated memory circuits and integrated micro-processor circuits.
    Type: Grant
    Filed: July 1, 1974
    Date of Patent: March 2, 1976
    Assignee: Motorola, Inc.
    Inventor: John K. Buchanan
  • Patent number: 3942047
    Abstract: A MOSFET voltage booster circuit generates a stepped up DC voltage from a lower magnitude supply voltage and a periodic input signal. A plurality of such MOSFET voltage booster circuits, which are formed only from components integrated in the MOSFET integrated circuit chip, may be formed on the chip near corresponding sections of circuitry requiring a high DC bias signal. A free-running oscillator circuit may provide the required periodic input signal.
    Type: Grant
    Filed: June 3, 1974
    Date of Patent: March 2, 1976
    Assignee: Motorola, Inc.
    Inventor: John K. Buchanan